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The Hardware Implementation Research Of Video Coding And Image Rotation

Posted on:2003-08-25Degree:MasterType:Thesis
Country:ChinaCandidate:M Q HuFull Text:PDF
GTID:2168360062975005Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the development of integrated circuit, FPGA and DSP processors have been widely used in many fields such as telecommunication ,image processing, pattern recognization and so on. With many resources and high speed, FPGA now has enabled much arithmetic implemental in hardware, which was not practical hi the past. The DSP processor is becoming faster and faster and has more parallel process units which enable DSP processor can execute more than one instructions in one cycle. The first section of this paper is concerned about how to implement video compressor based on H.263 standard using FPGA and DSP processor. First the survey of video encoding development has been conducted, then the video compression technology has been introduced and the application of FPGA and DSP processor in video compression field is appended, finally the hardware implementation of video compressor based on H.263 standard is introduced. According to the characteristic of FPGA, we bring forward the motion estimate and DCT/IDCT arithmetic which can be easily implemented in hardware. The motion estimation and DCT/IDCT arithmetic have fully exploited the parallel characteristic of FPGA. The second section of the paper introduces how to implement the real time image rotation system based on FPGA. First the arithmetic of image rotation is introduced , then we improve the arithmetic which is more suitable for hardware implementation and can save much resources , finally we introduce the system implementation.
Keywords/Search Tags:Hardware implementation, Video compression, H.263, Motion estimation, DCT/IDCT, Image rotation
PDF Full Text Request
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