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The Universal SoC Design On The Stored Testing And Measuring System For The Weapon Dynamic Test

Posted on:2011-12-13Degree:MasterType:Thesis
Country:ChinaCandidate:L P GongFull Text:PDF
GTID:2132360308981407Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Storage test brings forward strict requirements of micro-size, micro-power, high-performance, and high reliability for stored testing and measuring system, and the development of System on Chip (SoC) technology will offer effective technology methods for reducing system dimension, lowering power consumption and increasing reliability.The paper has researched the stored testing and measuring system(STMS) and its design theories, including the system design, sampling strategy design, the state design and so on. Based on the storage test theory, we designed the universal SoC on the stored testing and measuring system for the weapon dynamic test, described the composition of the chip, designed various sampling strategies for the diversity of the test environments, and designed the control module in detail, in addition, the programming and reading software has been designed. The paper simulated the control logic, verified the correcrtness of the design by experiments, showing the universality of sampling strategies for multiple signal acquisition which extended application range of the system.At last, the application of the universal SoC on the stored testing and measuring system for the weapon dynamic test in the field of storage test were prospected. This SoC chip can serve as core chip of a variety of weapons systems for dynamic parameter test, whose use will reduce the test system dimension, lower system power consumption, improve the reliability of test systems, furthermore, expand the test range, have widespread promoted value.
Keywords/Search Tags:storage test, sampling strategies, SoC, power consumption
PDF Full Text Request
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