| Abstract: CZT surface pixel arrays nuclear radiation detector is used to get nuclear radiative image, it is a concept of passive nuclear radiative image. Nowdays, it is a hot point of CZT studying abroad or internal. This paper studied the CMOS readout circuit and the key technique of the readout circuit associated with Analog to Digital Converter(ADC), it was targeted on the single pixel nuclear radative singal of CZT surface pixel arrays nuclear radiation detector, and based on the model of GSMC 0.18μm with power voltage 1.8V,. It can do some prepare for the miniaturization, portable and monolithic integration of the signal prossessing circuit of CZT surface pixel arrays nuclear radiation detector.Firstly, studied the CZT surface pixel arrays nuclear radiation detector and analysed the character of its output signal. And then, built the electric model of integrating the induced charge of CZT surface pixel arrays nuclear radiation detector based on its character descriped by many references.Secondly, used a preamplifier to pre-amplify the integrated signal of induced charge detected by the CZT surface pixel arrays nuclear radiation detector. Then, designed a band-pass circuit and a scaling amplifiy circuit to filter, denoise and amplify the output of preamplifier. At last, simulated the integrated analog circuit with the Spectre tool of Cadence.Thirdly, chose a high speed, 8 bit, low power consumption ADC——the pipeline ADC, which can fit the readout circuit of CZT surface pixel arrays nuclear radiation detector. It changes the analog signal of readout circuit to digital, and it's helpful for the follow-up signal processors(such as CPU, MCU, DSP. etc.) processing the radiative signal detected by CZT surface pixel arrays nuclear radiation detector and reverting the signal to nuclear radiative image. In the pipeline ADC, a Flash structure was used as the upper 4 bits and three-stage pipeline structure was used as the low 4 bits, it can avoid the huge circuit scale of Flash ADC and the harsh requirement of accuracy for the first sub-ADC when the whole circuit is made of pipeline structure. The amplitude of input signal was dispersed by a biphase sampling and hold circuit of the 4 Bits Flash ADC that was used as the first stage, it improved the accuracy of sampling and holding effectively. We simulated each module and the integral circuit with the Spectre tool of Cadence. Finally, Designed layout of each module and the whole readout circuit based on N well technology of GSMC 0.18μm.The results of simulation shows that:①The analog readout circuit of CZT surface pixel arrays nuclear radiation detector could preamplify, filter and denoise the integrated signal of induced charge, fourther more, the amplitude of the signal can be processed by follow ADC because of the amplifying of several amplified stages.②8 bits pipeline ADC have the accuracy of less than 1 LSB nonlineary error.③the power consumption of the whole circuit is less than 2mW, the area of the readout circuit is 868×681μm~2. Therefore, it is facilitated to be monolithic integrated and the nuclear radiation detection equipment to be portable. |
