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Analysis Of Voltage Sag In Grid Side Of Wind Power Converter And Research On Its Control Strategy

Posted on:2011-02-26Degree:MasterType:Thesis
Country:ChinaCandidate:Q G RenFull Text:PDF
GTID:2132360305450434Subject:Power electronics and electric drive
Abstract/Summary:PDF Full Text Request
When studying prime product produced by international famous wind power converter manufactures, it can be found that wind power converter should not only complete routine work like grid current feedback, but have operational capability with fault as well. What can be seen from current reference is that research on power converter is focused on unbalanced voltage condition. The wind power converter must possess abilities of Low Voltage Ride through (LVRT), available operation with unbalanced voltage fault and adjusting active as well as reactive power.This paper comes from a project of developing 1.5MW wind power converter the major content of which is developing digital inverter in grid-side. The main work of this paper is displayed as follows.Through analyzing impact of voltage drop in network side and unbalanced voltage on grid inverter, it can be found that traditional Phase-Locked Loop Circuit (PLL) is designed on the basis of three-phase balanced voltage or single-phase voltage, and therefore it cannot work under unbalanced voltage condition. In this paper, while designing positive sequence voltage detector, a novel phase-locked loop is introduced, which is insensitive to distortion and imbalance of voltage waveform. Simulation is conducted the results of which show that this new PLL circuit has excellent locking capacity toward frequency and phase of positive sequence component of unbalanced three phase voltage. Digital filter is an important part of positive sequence detector. With the aid of MATLAB, a low-pass filter is designed and exceptional results are obtained.Model of digital PWM inverter with two-level structure is analyzed. In order to make grid inverter adjust active and reactive power smoothly, a closed-loop with decoupled active and reactive current is implemented. Simulation results show that with this control scheme, excellent output waveform and tracking capacity can be obtained, however, output current is distorted and unbalanced when power system is asymmetrical, which is detrimental to recovery of faulty power system. In this paper, a control system with restraining negative sequence current is adopted simulation results of which demonstrate that output current waveform can meet sinusoidal and balanced demand.While choosing topological structure of primary circuit, merits as well as demerits of multi-level and two-level structure are evaluated. Due to advantages of multi-level structure such as few output voltage distortion and voltage stress, three-level structure is adopted as primary topology. Phase disposition modulation is selected as control strategy, which is digitally realized by EPWM module of DSP.Time delay and phase lag inevitably appear along with adopting digital controller. Accordingly, while designing digital controller, synchronous sampling manner is employed so as to effectively avoid data aliasing and reduce total time delay of sampling.TMS320F28335, a 32-bit floating point DSP, produced by TI company is adopted as chief control chip. The method of how to design sampling component is detailedly introduced in the process of designing hardware circuit, which significantly improve sampling precision and anti-jamming capability.Experimental results of prototype are given in this paper, which verify the effectiveness of proposed control strategy. Work done by this paper is summarized and what future work is focused on is given finally.
Keywords/Search Tags:Voltage drop, Digital PLL, Unbalanced voltage condition, Phase disposition modulation, Positive and negative sequence
PDF Full Text Request
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