Design Of Complete Synchronization Digital Frequency Meter Based On FPGA

Frequency is a basic parameter of electronics field,meanwhile,it's a very important parameter.Stable clock is very important in high performance electronics system,determining the syetem performance directly.With the development of technology of electronics,the frequency measurement system using higher clock,the frequency measurement technology has very nice development.In despite of using all other advanced frequency measurement methods,the positive and negative 1 errors was a very important factor that stop frequency measurement precision improving all through.The design expound the advantage and disadvantage of most digital frequency measurement methods .Through analyzing the origin of the positive and negative 1 errors ,got a new frequency measurement methods :checking the measured and standard signal's phase , if the phase is synchronous, then the counters start counting ,when the signal's phase is synchronous again ,the counter stopping working , by phase in-phase to eliminate counting errors ,then getting the real frequency through calculating .By this way's guide ,the design of complete digital cymometer was successfully completed with using VHDL(Very High Speed Integrated Circuit Hard Design Language)hardware description language and simulated it right. According to all of Synchronous Digital Block diagram of the frequency measurement using VHDL, the successful preparation of the design process, and in MAX + PLUS II software environment, the preparation of procedures for VHDL simulation, obtained very good results. Lastly, the frequency synchronization of the whole discussion of the hardware design and gives the circuit schematics and PCB plans. All of a synchronous digital frequency of each module, is a more detailed design and integrity of the process design and simulation results.