Design And Application Of Integrated Planar Spiral Inductor

With the development of IC process, CMOS technology becomes primary process of digital / analog IC, because that it is cheap to produce, and easy to integrate. With the MOSFET minimum channel length of CMOS process becomes shorter, the cut-off frequency of MOSFET device is more than 20 GHz. And more and more RFIC chips is produced by CMOS process. In the other hand, with the development of IC and communication technology, it is trend that RF transceiver system is integrated into a single CMOS chip. Inductor is an important passive component for turning, matching and filtering in RFIC. How to realize the high performance CMOS planar spiral inductor becomes the hotspot and bottleneck of RFIC.The development of planar spiral inductor and the importance of its designing are introduced in the very beginning of the paper. In order to induce the inductor model, the loss mechanics of spiral inductor are analyzed. Some different kinds of spiral inductor layout are compared. At the same time, some main kinds of methods for improving Q factor of spiral inductor are summarized. Then a simplified double-Πmodel of planar spiral inductor is presented, which can describe the effect of skin effect, proximity effect, substrate effect, feed-through capacitance, line coupling capacitance, distribution effect. The formula is given for estimating the components in the model. The estimated value can be used as the initial value for least squares (LS) fitting algorithm in the ADS software, which can make the fitting process efficiently. According to the simulation, the simplified modeling methodology shows excellent agreement with the results of the electromagnetic field solver (ADS momentum) over a frequency range from 0.1 to 10GHz. At last, a series of inductors are designed based on Chartered 0.25um RFCMOS process for digital-TV application. And a low phase-noise VCO is completed using one of the designed inductors. The phase-noise performance is obtained by Cadence SpectreRF. The post-simulation result demonstrates that the phase-noise of VCO core circuit is -89.4dBc/Hz@10KHz. The phase-noise performance is 6dB better than which uses the inductor by Chartered. The design can fit the digital-TV application absolutely (-85dBc/Hz@10KHz).