| Packan, a scientist in Intel corporation, predicted that if the size of chips go on shrinking as Moore's law, the joule heat generated in Very large scale integration (VLSI) would make itself reach its material thermal limit. Therefore, the thermal management of electrical device has been a worldwide hotspot of micro-electronics and thermal-conduction research since 1980s. Because of their low cooling power density and large volume, traditional thermal management devices, such as bulk thermalelectric cooler or heat sink with a fan, could not meet the thermal management needs of next generation chips. The superlattice thin film has better thermoelectric charactors than bulk materials. Recently superlattice based thermoelectrical coolers are fanscinating to the researchers due to several advantages such as large cooling power density, high efficiency, small volume and so on.Two cooling mechanism, thermoelectric cooling and thermionic cooling, was introduced in this article. By comparing thermoelectric cooling with thermionic cooling, a fact that thermionic cooling is better than thermoelectric cooling was pointed out. The superlattice structure was optimized according to electron transport theory in heterostructure and the result of 3ωmethod. In order to find the best condition to make metal-semiconductor contact, many metal-semiconductor contact samples were made under different conditions, and the transmission line method(TLM) was employed to measure the specific contact resistant. A 3D precise model was setted up to analyze the effect of substrate thermal resistante, superlattice thinkness, and contact resistant. InGaAs/InGaAsP and AlGaAs/AlGaAs superlattice based thermoelectrical coolers were fabricated using IC technology. A Harman method experiment platform was built to measure the seebeck voltage. The temperature difference under different current was measured using infrared camera. The test result is that InGaAs/InGaAsP superlattice based thermoelectrical cooler with a section area of 50×50μm2, and thinkness of 1.2μm could achieve 0.56K maxium temperature difference. Numerical analysis indicated that the contact resistant limits device performance. If it was neglected, the maxium temperature difference could reach 10K. |