The surface integrity of silicon wafer has become a key factor to affect the performance, quality and life of IC chips. With the increasing size of the wafer and decreasing line width of IC, higher surface quality of wafer is demanded. Among the precision process methods, wafer rotation grinding is considered as the most ideal technology for processing the large size silicon wafer. However, it can not avoid to bring the damage of the wafer surface/subsurface under the present condition, and the damage will severely affect the process time of the following polishing procedure. At present, many studies on the mechanism, analysis and detection of the damage, the prediction and control of the subsurface damage depth (SDD), should be carried out to achieve the low damage and high efficiency wafer grinding.Firstly, through the comparison of the methods used in the damage measurement on hard & brittle material, a set of methods for detecting the silicon wafer with different degree surface/subsurface damage are proposed to meet the different requirements, which are based on a lot of experiments and the optimization and combination of detection techniques.Secondly, the relationship between the surface grinding marks' orientation and the configuration of the subsurface cracks is investigated by the selective samples on the wafer surface, which is important to the research on damage mechanism. At the same time, the distribution rule of the SDD on the ground wafer is revealed. This study results will benefit to sample for the wafer damage detection in the following experimental study.Finally, according to a serial of single-factor experiments in wafer rotation grinding, the relationship between the grinding parameters and the SSD of the wafer is researched, and the research results will provide worthy reference for optimizing the wafer grinding parameters. |