| Particle physics experiments are the basic approach of research on the composition and interaction principles of matters in a micro scale.The Large Hadron Collider(LHC),the largest artificial particle physics experiment complexities,has made lots of great achievements.But physicists never stop searching for physics models in a deeper level.In order to explore unknown phenomena,in recent years the LHC plans a series of upgrades to enter a higher luminosity phase in which the particle experiments are going to be more efficient.However,higher luminosity will not only lead to a burst increase of interested collisions,but also out-of-interest ones alike,which are regarded as pile-up interactions.To meet the challenges of the pile-up,in ATLAS(A Toroidal LHC ApparatuS)and CMS(Compact Muon Solenoid)of LHC,a new particle detection technique is proposed,which is based on high precision time measurement combined with position information.This technique will enhance the capability in event discrimination for pile-up mitigation,to make the event reconstruction more accuracy.Under this background,a novel silicon-based semiconductor detector called Low-Gain Avalanche Detector(LGAD),is expected to satisfy the requirements on high time precision and spatial resolution of millimeter pitch size,which also has application potentials in other particle physics experiment complexities.Therefore,LGAD is an important research direction in the particle detection.To fully take the advantage of the LGAD in both the time and space resolution,it is necessary to devote efforts on the design of high granularity,high precision time measurement electronics.The high spatial density of the LGAD brings stringent restricts on the area and power consumption of the readout electronics.Therefore,the design scheme based on discreet components is not suitable for the LGAD readout.Thus an Application Specific Integrated Circuit(ASIC)is indispensable to achieve high-precision time measurement with fully digitized data readout.Since LGAD is a new type detector,currently,the global frontier study of LGAD readout ASICs are still under research and development.These prototype ASICs under development are incomplete in function and difficult to obtain.Therefore,for the requirements of the LGAD and its readout electronics research of China and technique accumulation,it is necessary to conduct independent research of the high-precision time measurement prototype ASIC for the LGAD readout,which is the focus of the work in this dissertation.One of the most challenging tasks of this ASIC is to achieve a high time precision of 20 ps with a low input signal charge as small as 10 fC,with all the circuits of multiple channels integrated within an arrayed structure.Compared with the highest time resolution of around 20 ps of the readout electronics in current large scale particle and nuclear physics experiments,we aim to achieve high precision time measurement with a much smaller signal amplitude(e.g.compared with the typical high precision time measurement detector,Multi gap Resistive Plate Chamber,the signal amplitude of LGAD is smaller by 1 order of magnitude).To target this goal,pre-amplifiers with a bi-MOS cascode input stage combined with an internal self-adaption power supply structure is designed to achieve high signal-to-noise ratio with low power consumption,which guarantees high time precision and a simplified circuit structure.In the time-to-digital conversion(TDC),a dual-ring vernier structure combined with "locked delay difference" is employed to achieve small bin size and high conversion speed in the fine time measurement,while counters are employed for coarse time measurement.And finally,both high time precision and large time measurement range are achieved.In actual design process,research is conducted step by step from key circuit analysis,design,simulation to fabrication and testing of verification ASICs,through which the technique route and key parameters of circuits are confirmed.Finally,a prototype of ASIC which integrates a 5×5 array with both analog front end and TDCs is designed and tested,and the test results indicate that a time precision of better than 20 ps is successfully achieved with 10 fC injected charge,which satisfies the goal of the research.The content of this dissertation is organized as:Chapter Ⅰ introduces the background of this work.The LGAD is proposed in particle experiments,which features the high time precision and spatial density.The basic working principles and signal characteristics of the LGAD are also briefly introduced.In Chapter Ⅱ,the main techniques in this research domain are reviewed,mainly focusing on the discrimination and time-to-digital conversion.And several typical ASICs are presented and discussed,as the references for the circuits design in this work.In Chapter Ⅲ,design of the prototype ASIC for the LGAD readout is presented.During the different phases of the prototype research,two ASICs--the analog front-end ASIC and TDC ASIC are designed and tested for basic scheme verification,and based on these a complete version ASIC is designed to integrate the both parts,and 5×5 channels are implemented.Chapter Ⅳ presents the test results of the ASICs.The test results indicate that all the prototype ASICs all function well.And a time precision of better than 20 ps with 10 fC injected charge is finally achieved the research objectives.Chapter Ⅴ concludes the work in this research,and the related future plans are presented. |
