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Study On The Reliability Of Phase Change Memory Based On GeTe/Sb2Te3 Superlattice Phase Change Materials

Posted on:2022-01-20Degree:DoctorType:Dissertation
Country:ChinaCandidate:L J ZhouFull Text:PDF
GTID:1488306572475544Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Following Moore's Law,MOS-based storage devices are approaching the physical limits,while cost barriers between production capacity and size reduction are forcing the industry to look for new storage solutions.Among the innovative memory technologies,phase-change storage technology,which is regard as the most feasible storage classic memory solution,has attracted attention for its superior performance and 3D stacking capabilities.To effectively realize the performance benefits of phase change memory over existing technologies,the memory cells must be able to operate reliably over the field life of the product.PCM's capabilities drive reliability requirements that in many cases fall between two established technologies,DRAM and NAND flash memory,and the fact that PCM is targeting nonvolatile memory applications imposes data retention requirements that are similar to NAND flash.At present,the phase-change memory has entered the stage of chip-level testing and commercialization,and has shown excellent performance,with improving reliability requirements for the phase-change memory.Therefore,the research on the failure mechanism and optimization schemes of phase change memory shows great practical significance.Among many reliability optimizations,the screening of phase change materials is the fundamental way to improve the reliability of the device.In this paper,the reliability of phase change memory is optimized by Ge Te/Sb2Te3 super-lattice phase change material in view of the reliability problems caused by contact resistance,resistance drift and read noise.The main research contents and conclusions are as follows:1.By adjusting the process parameters,amorphous Ge Te/Sb2Te3 superlattices that consist the designed parameters are prepared by pulsed laser deposition and magnetron sputtering,and crystalline Ge Te/Sb2Te3 superlattices with high lattice matching are prepared by in-situ heating and substrate induction method.It is proposed to use Sb2Te3 as a template to grow crystalline Ge Te/Sb2Te3 superlattices with ideal orientation.2.CTLM method is used to measure the contact resistance between Ge Te/Sb2Te3superlattice phase change material and the electrodes.Contact resistance,a parasitic resistance in phase change memory cell,plays an important role of the resistance and thermal resistance of phase change memory.It directly influences the performance of the phase change memory such as store window,endurance and data retention.Since it is impossible to eliminate contact resistance,obtaining stable and adjustable contact resistance is an important condition to improve the reliability of phase change memory.Since the bonding and charge distribution of superlattice greatly changed due to the layered structure,work function and surface state of Ge Te/Sb2Te3 superlattice show huge different with the traditional alloy phase change materials,which will significantly influence the contact between with Ge Te/Sb2Te3 superlattice and the metal.In this paper,the carrier transport mechanism between Ge Te/Sb2Te3 superlattice phase change materials and metal electrodes are studied,founding that the high surface state of the superlattice phase change material leads to the strong pinning effect at the contact interface with the metal.This strong pinning effect is beneficial to obtain stable contact resistance,but it is usually difficult to regulate.By adjusting structural parameters,one can regulate the contact barrier between superlattice and electrodes,the contact resistance of the metal and contact potential barrier,so as to gain stable and can control the contact resistance.3.According to the mechanism of resistance drift,Ge Te/Sb2Te3 superlattice is proposed to restrain the resistance drift in phase change memory,and the resistance drift coefficient is much lower than that of alloy phase change material.The stress relaxation and microstructure relaxation of amorphous phase change materials lead to the relaxation of defect energy levels in the bandgap,resulting in resistance drift in phase change memory.Microscopic analysis and theoretical calculation show that the defects that affect subthreshold transport processing in Ge Te/Sb2Te3 superlattice come from Te-Te long pairs around the interfaces between Ge Te and Sb2Te3,which are hard to relax due to the limitation of superlattice structure,resulting in suppression of resistance drift.This result provides an optimization strategy for improving the reliability of phase change memory.4.The low frequency noise characteristics and influencing factors of Ge Te/Sb2Te3superlattice phase change memory is studied.The noise power of superlattice phase change memory increases with bias voltage and decreases with temperature,and the source of noise is significantly different between the crystalline state and the amorphous state.The noise of amorphous superlattice phase change memory is mainly G-R noise,resulting in a negative correlation between normalized noise power and bias voltage,meaning that higher signal-to-noise ratio can be achieved by read pulse design.The noise of crystalline superlattice phase change memory is mainly 1/f noise,with 1?2 order of magnitude lower normalized noise power than that of amorphous state,is independent of bias,resulting in a stable signal-to-noise ratio.By studying the bias and temperature dependence excitation-trapping time constant of the G-R noise,it is found that the noise in the superlattice phase change memory mainly comes from the oscillatory relaxation of the deep defect center near the Fermi level.This result provides theoretical reference for further improving the signal-to-noise ratio of the device and optimizing the reliability of the device reading process.
Keywords/Search Tags:Phase change materials, Superlattice, Phase change memory, Reliability, Metal-semiconductor contact, Resistance drift, Low frequency noise
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