Research On Single Channel Sleep Eeg Classification Method And Design And Implementation Of Embedded System

With the acceleration of people's lives,more and more people are facing sleep disorders.According to relevant data,more than 300 million Chinese people have sleep disorders.The proportion of young people is particularly prominent,which affects people's life,work and physical health.The research of sleep stages classification can provide effective technical support for sleep disorders and clinical disease prediction,diagnosis and treatment.It has become a research hotspot in the fields of medicine and bioengineering,military security,and aerospace.The sleep stages classification is a process of automatically marking the various stages that a person has experienced during sleep through a certain method.At present,the classification process is mainly performed by professional and technical personnel relying on human eyes,which requires a lot of manpower to complete this work,and errors are prone to occur,leading to partial marking errors.In addition,the currently used multi-channel sleep EEG classification equipment is likely to have a greater impact on patients and even interfere with the sleep process.This thesis studies the classification methods,models and key technologies of sleep stages classification,and develops an embedded sleep classification system based on single-channel EEG.Relevant experimental verifications were carried out on three public databases,and the experimental results verified the correctness and feasibility of the research methods and systems.It mainly includes the following research contents:(1)Based on detailed analysis of single-channel sleep EEG classification,feature extraction methods,and related theories and research results of hardware support vector machines,the problems and shortcomings have been point out.And then this thesis proposes the research methods and technical routes planning of sleep stages classification based on single-channel EEG.(2)The single-channel EEG is used to solve the easy impact of multi-channel sleep EEG classification equipment on patients.Research on the key technology of singlechannel EEG effective information retention and noise artifact elimination.Aiming at the problem of poor filtering effect of existing FIR filters and missing EEG-specific shape features,a SG-FIR cascaded low-pass filtering method is proposed.According to the characteristics of sleep brain motor theory and frequency distribution,as well as local polynomial least squares fitting,this method cascades a finite impulse response filter to eliminate noise artifacts while keeping the shape and width of the EEG signal unchanged.Experiments with simulated signals and measured signals prove that compared with other filters,better performance indicators can be obtained,the signalto-noise ratio is effectively improved,and the mean square error is reduced.(3)Aiming at the problems of low sleep stages classification accuracy and low time resolution in existing research,this thesis divides sleep EEG into high,medium,and low time resolutions based on sleep EEG characteristics: 1 second,5-10 seconds and 20-30 seconds,a refined classification method of sleep EEG that models the three time resolutions,extracts features,and classifies separately is proposed.For the three kinds of time resolution signals,a state space model based on time series,a dual state space model based on wavelet packet transform,and a multi-resolution hybrid model based on double-density dual-tree wavelet decomposition are constructed respectively.And TSSMF features,combined features of DSSMF and WPLEF,and combined features of MHMF and D3 TLEF have been extracted.A comprehensive test on the classification accuracy has been carried out.The results show that compared with the existing research results,the classification accuracy of various classes of sleep stages classification has been comprehensively improved.Among them,the classification accuracy of the two classes reached 98.6%(TSSM),98.74%(DSSM),98.96%(MHM),the classification accuracy of the 6 classes is 15.27% higher than the existing researches,which proves the effectiveness and superiority of the proposed refined classification method of sleep EEG in this thesis.(4)This thesis has carried out research on the key technology of multi-class support vector machine hardware,and proposed hardware-oriented multi-class support vector machine algorithm,support vector machine classification function hardware solution algorithm and parallel-serial hybrid computing architecture.A multi-class support vector machine software for single-channel sleep stages classification was designed and realized by C++.Through the TOP-DOWN design method,the design has realized a configurable universal multi-class support vector machine IP core,which mainly includes kernel function calculation modules,control modules,training and prediction modules.After a variety of simulations and tests,the experimental results show that the multi-class support vector machine IP core implemented in this thesis is highly configurable,the power consumption is only 2.3W,the main frequency can reach330 MHz,and this IP core has both training and classification functions.It has good versatility and can not only meet the requirements of the embedded sleep stages classification system,but also can be embedded in other related systems.(5)Designed and completed the embedded single-channel EEG sleep stages classification system based on the multi-class support vector machine IP.Based on the multi-class support vector machine IP core bus encapsulation combined with the ARM to realize the system-on-chip,the transplantation and development of the embedded operating system and the sleep stages classification control program have been completed.The system can complete the tasks of signal preprocessing,feature extraction,training and classification under the control of serial port.After the classification accuracy and time test verification on the public database,the embedded sleep EEG classification system implemented in this thesis has reached the classification accuracy rate consistent with the x86 platform,and the classification speed has been greatly improved,which meet the design requirements.