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Design And Implementation Of Power Supply Prototype Digital Controller In HIAF-BRing

Posted on:2022-04-16Degree:DoctorType:Dissertation
Country:ChinaCandidate:Y L TanFull Text:PDF
GTID:1482306512982939Subject:Nuclear technology and applications
Abstract/Summary:
The Booster Ring(BRing)is the core of the acceleration unit in the High Intensity heavy ion Accelerator Facility(HIAF).It is the key part for obtaining high-current,high-energy and high-quality heavy ion beam.The rising rate of the magnetic field in BRing is required to reach 12 T/s to accelerate the beam from low energy to high energy in a short time,so as to improve the efficiency of the accelerator.Therefore,the rising and falling time of the power supply of BRing’s dipole magnet should be within 100 ms,and the rising rate ought to reach 38000 A/s.In order to achieve this goal,schemes of full energy storage,variable forward excitation and multiply full switching power modules connected in series and parallel are adopted in the dipole magnet’s power supply.A large number of film capacitors at the bus provide all the energy needed in the rising section.The high and low voltage switching scheme is used to achieve variable forward excitation;at the same time,requirements that the relative error of the current in the injection section should be within 5×10-5 and that the tracking error in the rising section should be within 1×10-4are meet.It adopts PWM rectifiers and choppers to achieve the full switching scheme.The power supply consists of 21 modules.7,6 high-voltage and 1 low-voltage,power modules are connected in series,and then three branches are connected in parallel to achieve the output target of 5100 A/3620 V.Those practical engineering requirements are not only challenges for the power supply,but also make its digital controller difficult to design.In order to solve the difficult problems of the spatial distribution,coordinated control and multi-signal transmission of all 21 power modules,and to improve the anti-interference performance of the digital controller,a master-slave controller architecture based on all fiber media transmission is proposed.Aimed at this master-slave controller architecture,a multi-module,multi-chip and high-speed data transmission mechanism is designed,and all the software development work is done.It has been integrated in the main controller functions like whole machine logic control,fault protection,network communication,debugging data read back,regulation,pulse output,etc..On the other hand,the slave controllers are capable of data acquisition,fault detection and PWM rectification.Based on the fact that HIAF-BRing power supply consists of multiple power modules connected in series and parallel,a power state detection polling mechanism based on FSM is designed to realize the overall orderly logic control,which makes the high-current,wide-voltage-range,high-power supply observable and stably operated.At the same time,it is supplemented by a double redundant module fault interlock protection system,which greatly improves the reliability of the power supply.In order to meet the debugging requirements of the power supply,this dissertation utilizes UDP Gigabit Ethernet to propose a low latency application layer protocol data analysis scheme based on FIFO,design a retransmission mechanism of application layer protocol,achieve the function of reading back,with time stamp,up to 65535 kinds of large-capacity data,and introduce the real-time data read back display function with a certain refresh rate,which greatly increases the security and efficiency of power supply debugging.This digital controller has been extensively applied in the prototype of HIAF-BRing power supply.Limited by the number of power modules,temporarily it achieves the control of 3 branches in parallel,each of which consists 5 modules in series,in total 15 modules,the requirements that rising and falling time are within 100millisecond,that of 5100 A/3620 V output,that the relative error of inject section is no more than 6.25×10-5,and that the tracking error in the rising section is no more than 2.5×10-4,which basically meets the design expectation.The feasibility and rationality of its engineering designs are verified during the on-stage power supply debugging and aging experiments for 10 months.In conclusion,an important technical problem in the HIAF project is solved.
Keywords/Search Tags:Distributed master slave control, Module fault interlock, Ethernet communication, Readback system
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