| With continuing scaling of microelectronics devices, electromigration reliability concerns become more severe and pose a threat to the performance of today's extremely fast and high device density semiconductor products. Miniaturizing of on-chip interconnects and the trend to higher transistor driving currents lead to ever higher current densities and therefore to increased vulnerability of backend-intensive process modules. In this study, a threefold approach was undertaken to assess the electromigration reliability of Al(Cu) interconnects. First, the basic physical phenomena leading to electromigration failure were subject of investigation. Using a novel test structure specifically designed to understand the underlying physical mechanisms, a clear separation into two stages was achieved. These stages are the incubation time during which Cu diffuses past a critical length, and the Al drift time during which void formation leads to measurable resistance increase and finally to interconnect failure. It was shown that the dominating mechanism at operating temperatures is the incubation time. In a second step, a statistical evaluation of device-level electromigration reliability was performed. Realistic semiconductor devices can incorporate up to several million interconnects, whereas test structures typically consist of only a few failure units. New test structures for statistical electromigration failure analysis were developed. Using large interconnect arrays in conjunction with the well-known Wheatstone Bridge technique, a total of more than 75,000 interconnects were tested. None of the tested samples has shown deviations from lognormal behavior, precluding the existence of an alternate or early failure mode down to the four sigma level. These findings support the assumption of lognormal behavior for electromigration failures and justify the use of lognormal characteristics in the extrapolation to very small cumulative failure rates required of devices in the field. In the third and final step, interconnect populations were characterized as a function of line length and width, and critical length phenomena were addressed. Resistance saturation effects were encountered at interconnect lengths close to the critical Blech-length and used for calculations of the critical current density-length product (jl)*. Wide line electromigration experiments were conducted to characterize large populations of interconnects of varying width commonly employed in actual semiconductor devices. |
