High-frequency ultrasound array and integrated-circuit beamformer

High-frequency ultrasound scanners operating at 10 MHz to 100 MHz are attractive because of the improved resolution (10 to 20 times) they offer compared with conventional scanners. High-frequency ultrasound has been used successfully in many medical applications. These include imaging the anterior segment of the eye, imaging of the skin and gastrointestinal tract, intravascular imaging, and measuring the condition of articular cartilage. Most of these applications use a single element transducer with a fixed focal length. This imposes a tradeoff between resolution and depth of field.; The obvious solution to the depth of field problem is to replace the single element with an array of elements and dynamically focus the array, thereby achieving a focused beam at any desired depth. Unfortunately, it is difficult to fabricate a high frequency array due to the extremely fine element spacing required to avoid grating lobes in the radiation pattern. For example, a 50 MHz linear phased array would require an element pitch of only 15 μm (one-half wavelength in water). The small size of the elements also makes it impractical to connect multiple RF coaxial cables to the array. Furthermore, the electrical impedance of small ceramic elements is large (1–10k), making it difficult to match the elements to an RF cable.; The purpose of this dissertation is to investigate ways of solving the difficulties associated with high-frequency arrays. There are essentially three parts to the work. In the first part, the design of a split aperture linear phased array that solves the element spacing problem is evaluated. In the second part, a novel matched-cell beamformer architecture is presented that is suitable for an integrated-circuit implementation. In the third part, the design and testing of an integrated-circuit (IC) beamformer that solves the impedance matching and cabling difficulties associated with high-frequency arrays is described. The IC, fabricated in a 0.35-μm CMOS process, is a practical implementation of the matched-cell architecture for a 5-channel planar annular array operating at 50 MHz.