Characterization of surface flashover and bulk properties of semiconductor test structures

The high field characteristics of semi-insulating materials such as high resistivity Si used for photoconductive power switch applications, as well as wide band gap semiconductors such as SiC used for high power electronic devices, need to be understood clearly before realizing reliable practical devices using these materials. In the first part of this dissertation an attempt is made to outline the dominant parameters that influence the high field behavior of semiconductor-ambient dielectric systems in general and specifically the properties of high resistivity silicon wafers used for photoconductive power switch applications. In the second part of the dissertation a novel high field characterization technique using a fast ramp response method is proposed to study high field behavior of SiC MOS and PN junction diode structures.;Using the systematic high field characterization technique, various features of the high field behavior of semi-insulating silicon has been elaborated. The influence of semiconductor surface condition, nature and properties of the ambient dielectric, sample/electrode geometry, contact architecture etc. on the prebreakdown current variation and the final surface flashover field has been determined. A thermal model to explain the delay between the current peak and voltage peak during double exponential voltage pulse stress application, as well as comprehensive physical model of surface flashover on Si has been proposed. Based on extensive experiments, a design for compact photoconductive power switches capable of withstanding fields in excess of 70 kV/cm in ambient air has been proposed.;The quality of gate insulator (silicon dioxide) on 4H and 6H SiC MOS structures, viz., its breakdown strength, has been non-destructively evaluated using the fast ramp response technique. The breakdown field or in most cases the field at which local avalanche current generation associated with defect activation takes place in SiC epilayers, has been determined by measurements in the deep depletion regime using the ramp response technique (or surface avalanche technique). Also, the maximum reverse breakdown voltages in 4H SiC PN junction diode MESA structures has been determined by this non-destructive ramp response technique.