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Fault-tolerant design for multilevel inverters

Posted on:2004-02-18Degree:Ph.DType:Dissertation
University:The University of Wisconsin - MilwaukeeCandidate:Kou, XiaominFull Text:PDF
GTID:1462390011976459Subject:Engineering
Abstract/Summary:
This dissertation explores the fault-tolerance design of multilevel inverters. The fault-tolerance features of several common multilevel inverter topologies are studied based on the voltage space vector. A unique design for flying capacitor type multilevel inverters with fault-tolerant features is presented. When a single-switch-fault per phase occurs, the new design can still provide the same number of converting levels by shorting the fault power semiconductors and reconfiguring the gate controls. The most attractive point of the proposed design is that it can undertake the single-switch-fault per phase without sacrificing power converting quality. This dissertation will also describe the capacitor balancing approach under fault-conditions, which is an essential part of controlling flying capacitor type multilevel inverters. Suggested fault diagnosis methods are also discussed herein. Computer simulation and lab results validated the proposed controls.
Keywords/Search Tags:Multilevel inverters, Single-switch-fault per phase
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