| Voltage controlled oscillator circuits generate the high-speed clock in phase locked loop circuits. As the operating frequency of digital communication systems increases, there is more restriction on the clock signal quality of digital circuits. For high frequency applications, the system operation becomes limited by timing margins of the circuits. Electrical clock signals with the least amount of jitter provide more time margins for system operations. Unfortunately, the increased clock jitter generated due to devices, thermal noise and high frequency effects attenuates the amplitude and reduces the timing margin for system operations [1]. Improved phase-noise performance of LC tank based VCO circuits has made them to be the essential components of phase locked loop circuits in high speed digital integrated circuits. High Q-factor LC tank circuits reduce the phase noise and provide more timing margins for high frequency applications. However, the most important challenge in the design of VCO circuits is to achieve a high Q-factor without reducing the frequency tuning ranges. At high frequencies, the parasitic resistance of the conductors in the spiral inductor increases due to skin effect and current crowding. For high frequency applications, current crowding resistance becomes a strong function of spiral inductor geometry. Currently, all the available models for current crowding [2], [3], and [4] do not take into account the effect of spiral inductor geometry. As a result, the existing current crowding expressions are not accurate for small spiral inductors operating at high frequencies. The inaccuracy of current crowding expression leads to inaccurate Q-factor prediction. Furthermore to achieve wide frequency tuning ranges, large capacitance tuning devices are needed. This increased capacitance of the LC tank degrades the Q-factor. Currently, capacitance equations [72], [75--77], [79], and [82] developed for GaAs technology are based on Schottky contact junctions and thus do not model the effect of substrate voltage on capacitance voltage characteristics of the 4 terminal MESFET based varactors. Furthermore, the capacitance tuning of MESFET based varactors becomes a function of channel length due to edge (side wall) capacitance. Currently available empirical capacitance expressions do not model this effect.; In this dissertation work, we present the design and characterization of high Q-factor and wide frequency tuning range LC tank based VCO circuits operating at 9.5--12.5 GHz frequencies. High Q-factor and wide frequency tuning ranges are achieved by developing accurate expressions for current crowding of spiral inductors and capacitance equations for MESFET based varactors. Improved current crowding expressions are achieved by modeling the geometry effects of spiral inductors. The accuracy of capacitance equations for varactors is improved by modeling the 4th terminal of MESFET (substrate) device and modeling the channel length effect on capacitance tuning. |
