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Nanocrystalline and amorphous silicon thin film transistors deposited by microwave plasma electron cyclotron resonance chemical vapor deposition: Material analysis, device fabrication and characterization

Posted on:2004-11-12Degree:Ph.DType:Dissertation
University:State University of New York at BuffaloCandidate:Teng, LihongFull Text:PDF
GTID:1461390011970197Subject:Engineering
Abstract/Summary:
Bottom-gated thin film transistors, employing ECR-CVD deposited nc-Si films as active channel layers, were fabricated, characterized and studied. These TFT's were fabricated at a low temperature range, 150°C–400°C and on different substrates, such as c-Si, quartz, glass and plastic. The effects of substrate temperatures and H2 dilutions during the Si film deposition on the film quality and TFT performance were studied. It was found that the TFT performance was improved as the substrate temperature and the H2 amount increased, including a higher mobility, a lower threshold voltage and a smaller subthreshold swing. This was due to the interaction of the H atom and nc-Si/a-Si network and the formation of strong Si-H and Si-Si bonds, which produced stable and high-performance TFT's.; Device-quality oxide was deposited at 150°C–300°C by PECVD using the decomposition of TEOS as the TFT gate dielectrics, which showed a high breakdown field of >8 MV/cm. The MOS capacitor C-V curves showed little stretch-out in the transition region and small horizontal shift compared with the theoretical C-V curve, which implied a low surface state density (∼10 11cm−2eV−1) at the Si/SiO 2 interface and a low density of fixed charges in the oxide.; The TFT performance is closely related to the active Si deposition conditions. For the TFT's with Si film deposited at 400°C with 10 mTorr H2, a mobility of 16.1 cm2/V-s, a threshold voltage of 2.6 V and a subthreshold swing of 0.45 V/decade were obtained for the TFT on a quartz substrate and a mobility of 13.3 cm2/V-s, a threshold voltage of 3.0V and a subthreshold swing of 0.48 V/decade were obtained for the TFT on a glass substrate. These TFT's had W/L of 200 μm/25 μm, which gave the best result among the several gate dimension designs. The incorporation of H2 during the deposition enhanced the crystallinity of the Si film, which was verified by the TEM measurements. For TFT's, the H2 incorporation not only passivated the dangling bonds in the active Si film but also filled the traps in the gate oxide near the Si/SiO2 interface, resulting in much-improved TFT characteristics, such as high on-current and steep subthreshold behavior. No post-hydrogenation process was carried out for these TFT's. The TFT's on plastic substrates were fabricated with a maximum temperature of 200°C, showing a mobility of 4.5 cm 2/V-s, a threshold voltage of 3.7 V and a subthreshold swing of 0.69 V/decade. The TFT's on plastic foil make the flexible, rugged and low-cost LCD applications possible. (Abstract shortened by UMI.)...
Keywords/Search Tags:TFT, Film, Tft's, Deposited, Deposition, Threshold voltage, Subthreshold swing
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