| The thickness of gate oxides in ultra-large-scale-integrated circuits will be reduced below 50 A by the year 2001. Since several angstroms error in gate oxide thickness can lead to large deviations in electrical characteristics, determining the oxide thickness accurately is a critical issue. In practice, only capacitance measurements, atomic force microscopy, and ellipsometry can deliver such resolution in thickness measurements. Compared to Atomic Force Microscopy and capacitance measurements, ellipsometry is more suitable for processing control because no further sample preparation is required. In principle, films thicker than a thousand angstroms can be measured--so can films thinner than 10 A. However, several problems still persist for ellipsometric measurements of thin dielectrics. These problems include erroneous assignment of film index, uncertainties of alignment and substrate index, and the ignorance of the roughness on ellipsometric modeling. In this work, we investigated these issues and developed a strategy to apply ellipsometry for ultrathin dielectric thickness control.; The Si/SiO{dollar}sb2{dollar} interface roughness is also crucial and has become a major issue during the development of ultra-large-scale-integrate circuits. As the size of semiconductor devices continues to scale down, the {dollar}rm Si/SiOsb2{dollar} interface becomes a substantial fraction of the device. The trend of reducing gate oxide thickness puts new restrictions on Si/SiO{dollar}sb2{dollar} interface roughness. In order to control the interface morphology, we have investigated the influence of thermal processing on the Si/SiO{dollar}sb2{dollar} interface roughness. The quantitative correlation between {dollar}rm Si/SiOsb2{dollar} interface roughness and inversion layer mobility is also provided in this work. The comparison between experimental result and theoretical predictions is also presented. |
