| This dissertation proposes a new algorithm that accurately estimates the delay and slew rate at each wire endpoint based on an RC extraction, regardless of the number of RC sections. Moreover, a new algorithm was developed to estimate the effective capacitance (Ceff) seen by a gate. In addition, this paper proposes an improved slew rate estimation metric based on prior work. The delay results produced by this work have a mean error of 0.37%, with a worst-case of 6.5%, compared to Hspice simulation results. In fact, 100% of the endpoints had a delay error less than 1.4 ps. Meanwhile, the leading commercial static timing analysis tool had a mean error of 1.35%, with a worst-case error of 11.3%, compared to Hspice simulation. For edge rates, this work produced a mean error of 1.88%, with a worst-case of 9.8%, compared to Hspice simulation, whereas the leading commercial static timing analysis tool had a mean error of 2.51%, with a worst-case of 10.6%, compared to Hspice simulation. |