A digitally-intensive amplitude-modulator for a polar edge transmitter

A digitally-intensive small signal polar 65 nm CMOS GSM/EDGE transmitter is presented with focus on the amplitude path. The transmitter uses an all-digital phase locked loop (AD-PLL) in combination with a digital power amplifier to achieve EDGE modulation without requiring the traditional mixers and variable gain amplifiers. Various new problems arising from the digital nature of the design are presented along with their innovative solutions. A new linearization scheme is presented, which compensates for non-linear distortions experienced in the amplitude-modulation path. The measured amplitude and phase distortions are stored in look-up-tables and used for predistortion without requiring inversion computations, thus achieving significant complexity reduction. Adaptive linear interpolation along with adaptive resolution enhancement provide the desired performance across power levels. Additionally, a systematic approach for the design and analysis of a 65 nm CMOS based RF-DAC is presented for the presented transmitter. The RF-DAC combines the functionality of a DAC and a mixer. Transistor mismatch has become one of the key design challenges at these smaller geometry process nodes and hence a method is presented to analyze the mismatch, quantify it and relate it to the system specification. Application of DEM is analyzed for spreading the mismatch noise and the conditions necessary for DEM to work are analyzed in the context of the RF-DAC operating at nearly 2 GHz. A digital predistortion scheme is presented to self-characterize and digitally compensate for the transistor mismatches within the transistor arrays of the RF-DAC.;The transmitter meets close-in spectrum specifications with more than 7 dB margin and RX band noise specifications with more than 6 dB margin while producing 2 dBm output power in EDGE mode. The best-in class performance is achieved with only 0.8 mm2 transmitter area.