Non-volatile memory characterization, modeling, and simulation

Nonvolatile memories are extensively used both as stand-alone and in embedded applications including microcontrollers. Yield loss in non-volatile memories due to charge loss is presented. A disturb mechanism present in the device was identified. The elimination of charge loss by process and design is addressed.; Characterization of bit cells including current-voltage and one-shot programming is done. Yield loss due to charge loss is investigated and a disturb mechanism is identified. Two approaches are taken to eliminate the charge loss from the floating gate to the control gate. These include, a double doping process and a new programming scheme. The double doping process was implemented and tested on actual devices.; To understand the device performance, a hot electron injection model for gate current is developed. The model is first compared to actual threshold voltage measurements and shows a good fit. The model is then used to depict the effects of gate oxide thickness, inter-polysilicon dielectric thickness, control gate and drain voltages, and gate channel length on the device performance. The results attained are then used to suggest charge loss reduction.; Computer simulations was performed and compared to model showing a good fit. Simulations provide an additional insight into the device characteristics, including lateral and vertical electric field components.