| The CDMA receiver sensitivity can be significantly degraded by the cross modulation distortion (XMD), which is generated primarily by the LNA. To analyze XMD, this dissertation proposes a new model of the reverse-link CDMA signal. The derived XMD expression is used to specify the requirement to the input 3rd-order intercept point (IIP3) of CDMA LNAs.; Among linearization techniques suitable for the CDMA LNA design, this dissertation investigates the optimum out-of-band tuning, optimum gate biasing, and derivative super-position (DS) methods. These techniques are analyzed using the Volterra series. Practical LNA designs are used to confirm the theoretical results.; The optimum out-of-band tuning can be applied to both the difference-frequency and 2nd-harmonic terminations, or just one of them. It is shown that optimizing both terminations results in a higher IIP3, but the latter is very sensitive to the tone frequency. Using just a low-frequency low-impedance input termination is more suitable for high-volume production, but it works only under certain restrictions on the BJT cut-off frequency, the emitter degeneration impedance and the 2nd-harmonic input termination.; This dissertation proposes a novel bias circuit to automatically generate the gate-source voltage at which the 3rd-order derivative of the FET transfer characteristic is zero. However, at RF, the IIP3 peak shifts from this voltage and becomes smaller due to the 2nd-order interaction. The proposed optimum tuning of the drain load impedance improves IIP3, but its peak remains shifted relative to the bias for zero derivative. Thus, a manual bias adjustment is required, which makes IIP3 very sensitive to the bias variations.; The DS method extends the bias voltage range in which a significant IIP 3 improvement is achieved. However, the 2nd-order interaction still degrades IIP3 at RE A modified DS method is proposed to improve IIP3. An observation is made that the composite FET in both the conventional and modified DS methods exhibits a higher NF than that of a single FET. This phenomenon is theoretically attributed to the contribution of the induced gate noise of the FET operating in the subthreshold region. |
