Complex oxide thin films for microelectronics

The rapid scaling of the device dimensions, namely in metal oxide semiconductor field effect transistor (MOSFET), is reaching its fundamental limit which includes the increase in allowable leakage current due to direct tunneling with decrease of physical thickness of SiO2 gate dielectric. The significantly higher relative dielectric constant (in the range 9--25) of the gate dielectric beyond the 3.9 value of silicon dioxide will allow increasing the physical thickness. Among the choices for the high dielectric constant (K) materials for future generation MOSFET application, barium strontium titanate (BST) and strontium titanate (STO) possess one of the highest attainable K values making them the promising candidates for alternative gate oxide. However, the gate stack engineering does not imply the simple replacement of the SiO2 with the new dielectric. Several requirements should be met for successful integration of a new material. The major one is a production of high level of interface states (Dit) compared to that of SiO 2 on Si. An insertion of a thin SiO2 layer prior the growth of high-K thin film is a simple solution that helps to limit reaction with Si substrate and attains a high quality interface. However, the combination of two thin films reduces the overall K of the dielectric stack. An optimization of the SiO2 underlayer in order to maintain the interface quality yet minimize the effect on K is the focus of this work. The results from our study are presented with emphasis on the key process parameters that improve the dielectric film stack. For in-situ growth characterization of BST and STO films sputter deposited on thermally oxidized Si substrates spectroscopic ellipsometry in combination with time of flight ion scattering and recoil spectrometry have been employed. Studies of material properties have been complemented with analytical electron microscopy. To evaluate the interface quality the electrical characterization has been employed using capacitance-voltage and conductance-voltage measurements. Special attention was given to the extraction of static dielectric constant of BST and STO from the multiple film stack. The K value was found to be sensitive to the input parameters such as dielectric constant and thickness of interface layers.