A stochastic approach to digital control design and implementation in power electronics

This dissertation uses the theory of stochastic arithmetic as a solution for the FPGA implementation of complex control algorithms for power electronics applications. Compared with the traditional digital implementation, the stochastic approach simplifies the computation involved and saves digital resources. The implementation of stochastic arithmetic is also compatible with modern VLSI design and manufacturing technology and enhances the ability of FPGA devices.; New anti-windup PI controllers are proposed and implemented in a FPGA device using stochastic arithmetic. The developed designs provide solutions to enhance the computational capability of FPGA and offer several advantages: large dynamic range, easy digital design, minimization of the scale of digital circuits, reconfigurability, and direct hardware implementation, while maintaining the high control performance of traditional anti-windup techniques. A stochastic neural network (NN) structure is also proposed for FPGA implementation. Typically NNs are characterized as highly parallel algorithms that usually occupy enormous digital resources and are restricted to low cost digital hardware devices which do not have enough digital resource. The stochastic arithmetic simplifies the computation of NNs and significantly reduces the number of logic gates required for the proposed the NN estimator.; In this work, the proposed stochastic anti-windup PI controller and stochastic neural network theory are applied to design and implement the field-oriented control of an induction motor drive. The controller is implemented on a single field-programmable gate array (FPGA) device with integrated neural network algorithms. The new proposed stochastic PI controllers are also developed as motor speed controllers with anti-windup function. An alternative stochastic NN structure is proposed for an FPGA implementation of a feed-forward NN to estimate the feedback signals in an induction motor drive. Compared with the conventional digital control of motor drives, the proposed stochastic based algorithm has many advantages. It simplifies the arithmetic computations of FPGA and allows the neural network algorithms and classical control algorithms to be easily implemented into a single FPGA. The control and estimation performances have been verified successfully using hardware in the loop test setup.; Besides the motor drive applications, the proposed stochastic neural network structure is also applied to a neural network based wind speed sensorless control for wind turbine driven systems. The proposed stochastic neural network wind speed estimator has considered the optimized usage of FPGA resource and the trade-off between the accuracy and the number of employed digital logic elements. Compared with the traditional approach, the proposed estimator uses minimum digital logic resources and enables large parallel neural network structures to be implemented in low-cost FPGA devices with high-fault tolerance capability. The neural network wind speed estimator has been verified successfully with a wind turbine test bed installed in CAPS (Center for Advanced Power Systems).; Given that a low-cost and high-performance implementation can be achieved, it is believed that such stochastic control ICs will be extended to many other industry applications involving complex algorithms.