Receivers using Schottky Barrier diodes in CMOS

With the rapid expansion of the market for low-cost communication devices, Complementary Metal Oxide Semiconductor (CMOS) integrated circuits technology has emerged as the technology of choice and is envisaged to remain as such. The ultimate goal has been to integrate all functionalities on one die thereby reducing the form factor, minimizing the cost, and simplifying use. This dissertation presents and demonstrates the concept for efficiently providing the additional utility of signal rectification and detection in CMOS that could be used for radio frequency (RF) signal demodulation and on-chip testing.;Rectification of amplitude modulated (AM) signal at RF requires high-speed devices that have close to exponential transfer characteristics (current-voltage, I-V). Schottky Barrier diodes (SBDs), fabricated without any changes to the mainstream CMOS process flow provide 100% improvement in the conversion gain over MOS transistors for detection circuits. The requirement for not making modifications is critical towards reducing the chip manufacturing cost. The SBDs fabricated in a 130-nm CMOS process have close to ideal exponential I-V characteristics and have cut-off frequencies well over a THz. It may be possible to open up the market for RF as well as sub-millimeter wave applications using these diodes. Experimental study into the layout of these devices indicates that it is possible to engineer these diodes for use in detectors with over 30 GHz bandwidth while maintaining comparable cutoff frequency. Also, instead of using an oxide ring, by using a polysilicon gate layer to isolate the Schottky and well contacts, the cutoff frequency can be increased beyond 2 THz.;The utility of these diodes is demonstrated by implementing a detector suitable for pulse-based ultra-wideband (UWB) applications. The detector is capable of operating in the UWB range of 3.1--10.6 GHz with ∼-56 dBm sensitivity for 100 Mbps data rate and 1-GHz pulse width. Using a detector based scheme eliminates the need for a PLL, mixer and its drivers thereby drastically reducing the power consumption. The power consumption is only 8.5 mW.;Wireless interconnects capable of replacing opto-couplers currently used on a hybrid engine controller board are presented. The wireless interconnects provide higher data rates and the same functionality as opto-couplers while reducing the cost and footprint. However, the control board with lots of metal traces and components is expected to be a harsh environment for wireless communication. The system uses code division multiple access (CDMA) on the down link and frequency division multiple access (FDMA) on the up link. The CDMA receiver uses a SBD based detector for down-conversion at frequencies ranging from 15--20 GHz. A prototype of SBD detection based CDMA receiver is implemented in a 130-nm CMOS foundry process and used to demonstrate a wireless link in the hybrid motor controller board. The receiver reconstructs the clock from the incoming signal thereby eliminating the need for an external frequency reference. The receiver has 35-dB peak gain and operates optimally between 14--16 GHz. The sensitivity for an Eb/No of 14 dB and 400-Mbps data rate is -58 dBm and the noise figure (NF) is 20 dB. The power consumption is ∼60 mW and the receiver occupies ∼2.1 mm2 of area. Successful reception and de-modulation of an AM signal transmitted 15 cm away, using the receiver, indicates the feasibility of wireless communication within the control board.