| The wide bandgap semiconductor silicon carbide (SiC) has received much attention as a promising material for high power, high frequency, and high temperature operating devices. Among a number of polytypes of SiC, cubic silicon carbide (3C-SiC) has received much attention because Si can be used as substrates to grow 3C-SiC epilayers. This provides a potential low-cost fabrication option for large-scale integration. Nevertheless, the low quality of the heteroepitaxial 3C-SiC on Si, due to a 20% lattice parameter mismatch and 8% difference of thermal expansion coefficient between Si and SiC, has prevented the development of 3C-SiC-based devices.;In the presented work, design and experimental verification for 3C-SiC vertical Schottky barrier diodes (SBDs) are of primary focus. In order to utilize 3C-SiC to its full potential for electronic device applications, efforts to improve the crystalline quality and surface morphology of 3C-SiC films are also highlighted. Surface morphology significantly improved by changing the propane-gas-introduction temperature, for initiating carbonization environment, from 1100 °C to 700 °C. Surface investigation in 3C-SiC films with various carbonization conditions reveals a significant decrease in the density of surface defects with decreasing carbonization temperature, with greater than 400/mm2 for 1250 °C carbonization and less than 30/mm 2 for 1150 °C carbonization. Schottky barrier diodes on the home-made 3C-SiC films were fabricated with a 10-μm-thick drift layer with a doping of 4 x 1015/cm3, a 5-μm-thick buffer layer with a doping of 3 x 1018/cm3, ohmic contacts on via deep etch process reaching the buffer layer, and Ni Schottky contacts. An ideality factor of 1.4, a barrier height of 0.61 eV, and a soft-breakdown voltage of 15 V were obtained. The calculated Schottky barrier height of Ti, Ni, and Pt contacts to n-type 3C-SiC shows almost constant from one metal to another, indicating a strong pinning effect at the interface between the metal and 3C-SiC in the present study. Investigation of surface morphology using AFM reveals that this low barrier height largely deviated from the expected value of 1.15 eV and strong pinning effect are attributed to rough surface morphology with RMS value of around 10 nm, caused by a bunch of anti-phase boundaries. |
