All-optical logic gates based on vertical cavity semiconductor optical amplifiers

This dissertation focuses on the three most significant logic elements which can be formed from Vertical Cavity Semiconductor Optical Amplifier (VCSOA) inverters for the purpose of all-optical communication systems. These logic elements are the Set-Reset (SR) flip-flop, XOR gate, and NAND gate, and together with the basic building block VCSOA inverter, they hold promise for performance improvement in all-optical signal processing. This dissertation investigates the theory and implementation of these gates, and also provides a study of the dynamic properties of the VCSOA inverter in an effort to understand the overall performance improvement that may be provided by VCSOA logic gates.;An all-optical Set-Reset (SR) flip-flop based on VCSOAs is demonstrated experimentally and theoretically. It is shown that the flip-flop can be constructed from 2 cross-coupled VCSOA inverters using the principles of cross-gain modulation, polarization anisotropy, and nonlinear gain to achieve flip-flop functionality. The flip-flop is also shown to be cascadable, have low switching power (∼10muW), have the potential to be integrated on a small footprint (100mum 2), and have the potential for single-wavelength operation.;An all-optical exclusive-OR (XOR) and Not-And (NAND) gate are demonstrated experimentally and theoretically. Based on a similar platform as the flip-flop, the XOR and NAND also demonstrate the same advantages in terms of cascadability, low switching power, and high-density integration. The demonstration of XOR and NAND functionality, however, proves the versatility of the VCSOA inverter platform, and the similarity to electrical inverters highlights a key advantage of VCSOAs for developing more complex circuits.;Finally, the dynamic behavior of the VCSOA inverter is studied experimentally and theoretically. The similarity between VCSOAs and VCSELs indicate that the response time of both are limited by the same factors, and thus may have the same possible solutions. Large signal analysis indicates a discrepancy in the speed of positive (rising edge) versus negative (falling edge) logic transitions which can be attributed to differences in the carrier recombination time that result from nonlinearity in the intensity-dependent gain. Small signal measurements indicate that the modulation bandwidth of the inverter approximates that of electrically modulated VCSELs, which supports the conclusion that carrier recombination time is the primary limiting factor.