| Modern day designs are affected by many modeled and unmodeled effects. These effects interact with the design and each other to produce a complex statistical system that is difficult to analyze. The interaction created between one of these effects, process variations, and the design has been studied extensively in recent literature, resulting in statistical methods to model and analyze chip timing. We call this interaction's effect on the timing of a design timing variability. Moreover, timing-dependent effects can interact with timing variability to create timing uncertainty . These timing-dependent effects can include cross-coupling, multiple input switching, and power noise, the effects of which depend on the timing alignment of signals. Because of process variations affecting the timing alignment of signals, they can have diverse effects across different chips. Therefore, the focus of this dissertation is on timing uncertainty on top of timing variability creating a complex statistical system. Using cross-coupling as a driver example, we combine different tools such as regression, a Boolean Satisfiability solver (SAT), Ordered Binary Decision Diagrams (OBDD), non-parametric density estimation, and a statistical timing simulator characterized using Monte Carlo SPICE based on a 90nm CMOS technology to analyze and develop a solution for the problem of statistical timing uncertainty. Finally, we develop a necessary and a sufficient condition to look for during design and test in order to bound design timing sensitivity to process variations. |
