| To overcome the issues of mobility degradation and charge trapping in silicon high-kappa MOSFET, a stacked Y2O3(top)/HfO 2(bottom) gate dielectric on silicon substrate has been developed. Compared to the HfO2 reference, the new dielectric shows similar scalability, but superior channel mobility and device reliability. The mobility improvement can be attributed to reduced remote phonon scattering, which is associated with the smaller ionic polarization of Y2O3, and the suppressed coulomb scattering due to less electron trapping in the bulk of high-kappa layer, and reduced metal impurities in the substrate.;The passivation mechanisms for the silicon IPL passivation technique in GaAs/alpha-Si IPL/high-kappa MOS system have been investigated. We demonstrate the alpha-Si IPL thickness dependence and substrate type dependence of interface state density (Dit) for GaAs MOS capacitors. The interface state density is strongly correlated to the thickness and quality of unoxidized Si IPL and its interaction with the underlying substrate. The results can be explained by the models related to the quantum well narrowing or the reduced local trap density as the unoxidized Si IPL layer thickness decreases. By using optimal Si IPL thickness (∼10 A), GaAs MOS devices can achieve the same interface quality, as its silicon counterpart. Using Si IPL to unpin the surface Fermi level, the self-aligned depletion-mode and enhancement-mode GaAs n-MOSFETs are demonstrated. In addition, the charge trapping and wear-out characteristics of the GaAs/Si IPL/HfO2/TaN MOS devices are systematically investigated.;High performance In0.53Ga0.47As nMOSFETs with Si IPL and HfO2 gate oxide have been demonstrated. We systematically investigate the impacts of (1) Source/Drain activation temperature, (2) post deposition annealing (PDA) temperature, (3) In0.53Ga0.47As channel doping concentration, (4) channel thickness and (5) Si IPL thickness on the transistor performances. With the optimal combination of these impacting factors, excellent device characteristics have been obtained, including the peak transconductance of 7.7 mS/mm (Lg=5 mum, V d=50 mV), drive current of 158 mA/mm (Lg=5 mum, V gs=Vth+2 V, Vd=2.5 V), and the peak effective channel mobility of 1034 cm2/V-s.;InP nMOSFETs with Si IPL and HfO2 have been demonstrated. The effects of Si IPL on the transistor performances and reliability characteristics are investigated. It is found that even through InP is a forgiving channel material with respect to surface Fermi level pinning, applying silicon IPL still improves the transistor performance and reliability. But the choice of Si IPL is critical for device design. Both in-sufficient passivation and excessive Si IPL should be avoided. |
