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Research On NoC Testing Technology And Optimization Methods

Posted on:2018-10-31Degree:DoctorType:Dissertation
Country:ChinaCandidate:C HuFull Text:PDF
GTID:1368330542992947Subject:Measuring and Testing Technology and Instruments
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Network-on-chip(No C)technology architecturally solves a series of problems derived from the bus-based system-on-chip(So C).With high performance,low power consumption,good global clock synchronization strategy,good reusability and good extensibility,No C is the trend of the next generation of integrated circuit.However,the number of intellectual property(IP)cores increasing in No C integration and complexity increasing in its function involve No C testing facing a huge challenge.It is urgent to investigate effective testing technology and optimization method.This dissertation mainly investigates the theory and application of No C testing and testing optimization problems from test architecture and test scheduling,especially testing scheduling optimization.Proceed with the analysis of characteristics of the No C and the related factors influencing the test,this dissertation optimizes the influence factors and further combined with the intelligent optimization algorithm.Some key problems in view of the No C testing are investigated in this dissertation,the main research contents and results are as follows:1.The issues of test data transmit conflicts and bandwidth mismatch between No C channel and IP core test wrapper on the condition of reuse No C as test access mechanism(TAM).We propose XY-direction connected subgraph partition(XYCSP)approach to divide the No C topology into connected subgraphs with the size of TAM.In this way,the IP cores within the same connected subgraph adopt the same TAM and IP cores with different connected subgraph are tested without interference.As a result,each of the IP core is tested on a TAM without path conflicts.In other words,path conflicts before testing are eliminated,and concurrently the position of test access points are determined.We then present a multiple test clocks strategy to bridge the gap between the No C channel bandwidth and the core test wrapper bandwidth.The strategy assigns different clocks to different time-consuming IP cores and takes power constraints into account.With the help of adaptive probability gate quantum-inspired evolutionary algorithm(APGQEA)strategy,which blends adaptive strategy and multi-nary oriented techniques,permits quick exploration and exploitation of the solution space.Experimental results for the ITC'02 test benchmarks show that the proposed scheme can achieve shorter test time and higher efficiency compared to prior works.In addition,a Markov chain model of APGQEA algorithm is established to study the status transition process of the population,and APGQEA algorithm is proved to be global convergence,which provides theory basis for APGQEA algorithm.2.The issues of utilization of limited I/O resources of automatic test equipment(ATE)on the condition of the reuse No C as TAM.Efficiently using the limited I/O resources provided by ATE to test No C is a key issue in No C test scheduling optimization.Numerous test scheduling approaches for No C have been proposed to test the embedded cores.Yet,these approaches commonly assumed that a whole TAM is occupied by an embedded core during testing.Different from these existing approaches,in this dissertation,we propose an approach for efficiently utilizing the TAM resources for test scheduling in No C.We make use of the bandwidth division multiplexed(BDM)strategy,which divides a single TAM into several sub-TAMs with different width,enables multiple embedded cores share the same TAM to achieve transmission at the same time,thus maximize the test parallelism.Then,a variable population multi-nary quantum-inspired evolutionary algorithm(VMQEA)strategy,which incorporates multi-nary and variable population techniques,is presented to solve the test scheduling optimization problem of No C.In addition,path delays,path conflicts and power constraints were taken into consideration.Experimental results for the ITC'02 test benchmarks show that the new approach results in substantial reduction in overall test time for a limited TAM budget,compared to previous works.3.The issues of multi-objective optimization with test time and test power consumption on the condition of the reuse No C as TAM.The co-optimization of test time and test power consumption is currently an emergency problem to be solved for network-on-chip testing.In this dissertation,we proposed a harmonic distance quantum-inspired multi-objective evolutionary algorithm(HQMEA)for No C test scheduling optimization.Therefore,for the sake of saving testing resources and improving the test efficiency,we adopt the parallel test method of the reuse No C as TAM to test the IP cores of the No C.On the basis of the quantum-inspired multiobjective evolutionary algorithm(QMEA),the proposed algorithm adopt multi-nary probability angle coding as an alternative to probability amplitude binary coding,which is suitable for the No C test scheduling problem;Then,the proposed algorithm using the harmonic distance as a represent of crowded distance to better measure crowded degree;In addition,the proposed algorithm adopt the strategy of chaos dynamically updating rotation angle to improve the balance between exploration and exploitation of the algorithm.The comparative experiments are conducted on the ITC'02 test benchmarks.The results show that compared with quantum multiobjective evolutionary algorithms,the proposed algorithm not only improves the convergence of the algorithm,but also ensures a better distribution on t he Pareto front.It confirms the superiority of the proposed algorithm in solving multiobjective optimization problems.In addition,a Markov chain model of HQMEA algorithm is established to study the status transition process of the population,and HQMEA algorithm is proved to be global convergence,which provides theory basis for HQMEA algorithm.4.The issues of test time minimization on the condition of testing with dedicated TAM.For the No C testing with dedicated TAM,we propose a new meta-heuristic algorithm named Levy flights multi-verse optimizer(LFMVO),which incorporates Levy flights into multi-verse optimizer(MVO)algorithm to solve numerical and engineering optimization problems.The Original MVO easily falls into stagnation when wormholes stochastically re-span a number of universes(solutions)around the best universe achieved over the course of iterations.Since Levy flights are superior in exploring unknown,large-scale search space,they are integrated into the previous best universe to force MVO out of stagnation.We first test this method on t hree sets of 23 well-known benchmark test functions and then on the optimization problem of test scheduling for No C.Experimental results prove that the proposed LFMVO is more competitive than its peers in both the quality of the resulting solutions and convergence speed.
Keywords/Search Tags:NoC, test optimization, quantum-inspired evolutionary algorithm, multi-verse optimizer, multi-objective optimization
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