Key Technology Research Of Cascaded H Bridge Multilevel Inverters

This paper focuses on the key technology of cascaded H bridge multilevel inverters.The major content includes the improved phase shifted carrier pulse width modulation method,the calculation method of carrier phases,the inverter power loss ride-through method and the improved power loss ride-through method for over modulation.Many factors result in unequal H bridge cell dc voltages,such as the differences in cell dc source parameters.Unfortunately,the conventional phase-shifted carrier pulse width modulation(PSCPWM),which is widely used for CHBML inverters,cannot eliminate low frequency sideband harmonics when cell dc voltages are not equal.On the other hand,the carrier frequency of high-voltage great-power inverters are usually low,thereby,the frequency of the sideband harmonic around the carrier frequency and the double carrier frequency is low.In practical application,the lower the harmonic frequency,the greater the harmonic impact.The inverter output voltage harmonic is analyzed by use of the double Fourier integral analysis.An improved phase shifted carrier pulse width modulation(PSCPWM),in which the cell carrier phases are regulated according to the cell dc voltages,is proposed.It is necessary to solve the transcendental equations for the cell carrier phase calculations when the cell carrier phases are regulated according to the cell dc voltages.It is obvious that the transcendental equations are difficult to be solved by use of classical mathematic methods.Based on the characters of the equations,two modern stochastic search techniques,particle swarm optimization(PSO)and artificial bee colony(ABC)algorithm,are improved to calculate the cell carrier phases.But solving the equations by use of the stochastic search algorithm,needs great calculating capacity that is usually beyond the capability of the inverter controller.In this paper,a hybrid method,which is the combination of the stochastic search algorithm,the look up table and the linear calculation,is proposed to calculate the carrier phase rapidly.In industrial application,many factors,such as the equipment faults,the load impact and the starting of the great-power equipment nearby the inverter,usually result in a significant decrease in the grid voltage.The phenomenon that the grid voltage decreases to zero is usually named power loss.Unfortunately,when the grid voltage decreases,the inverter possibly stops,and the production procedure may be destructed.The potential by-products are economic losses and production accidents.In this paper,the power loss ride-through method of cascaded H bridge multilevel inverters is proposed.Firstly,the sum of all cell dc voltages is controlled and stabilized.Secondly,three phase circuit dc voltages(UdcA,UdcB and UdcC)that are the sum of the cascaded H bridge cell dc voltages in A,B and C phase circuit respectively,are balanced.Since the inverter output current magnitude is approximately constant,a novel method,in which the zero sequence voltage is applied to balancing Udc A,UdcB and UdcC,is proposed.The proposed method produces the zero sequence voltage by use of Udc A,Udc B,UdcC and three current phases.Comparing with the conventional method that is widely used in STATCOM,the proposed method is sensitiveless to detection errors.Finally,the cascaded H bridge cell dc voltages are balanced by controlling the electric power fed back to the cell.The method should be applicable to the condition that the motor speed higher than 70% nominal value.Considering that the linearly controllable area of cell dc voltage controlling is limited,the proposed method arranges the linearly controllable areas,and improves the cascaded cell dc voltage balancing performance.Under the condition of heavy load and high motor speed,during the first period of riding through the power loss fault,the inverter dc voltage is usually low,because of the delay of detecting and judging the grid voltage decrease or power loss fault and the other factors.On the other hand,comparing with the decrease of the dc voltage,the motor decelerates slowly.Therefore,during the first period of riding through the power loss fault,the inverter output voltage magnitude is high.Considering the low dc voltage and the high output voltage,over modulation is inevitable.It is obvious that over modulation reduces the performance of controlling the sum of all cell dc voltages and balancing three phase circuit dc voltages(UdcA,UdcB and UdcC).Under some special conditions,over modulation may result in the failure of the power loss ride-through.In this paper,an improved method is proposed for the controller of the sum of all cell dc voltages.And an improved method is designed to balance UdcA,UdcB and UdcC.These methods improve the inverter power loss ride-through capacity and reducing the failure factors.The proposed modulation method,the cell carrier phase calculation method,the power loss ride-through method and the improved methods for over modulation are all verified by the simulation and the prototype inverter experiment.