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Electric Field Optimization And Frontier Fabrication Techniques For High Voltage Enhancement-Mode AlGaN/GaN HEMTs

Posted on:2017-02-08Degree:DoctorType:Dissertation
Country:ChinaCandidate:C TangFull Text:PDF
GTID:1318330512477289Subject:Electrical engineering
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?-? compound semiconductor Gallium Nitride(GaN)has drawn great attention all over the world due to its superior material characteristics including wide bandgap and high critical electrical field.Different from conventional Si-based power semiconductor devices,GaN-based AlGaN/GaN HEMTs utilize the unique heterojunction structure with polarization effects to spontaneously provide a lateral 2DEG channel with high electron concentration,high electron mobility and high electron saturation velocity.These advantages make AlGaN/GaN HEMTs device a competitive game changer in modern power electronic device industry.Even though with vast industry potential,currently AlGaN/GaN HEMTs still bear a few technical issues that hinders the fast development of GaN industry.1)As AIGaN/GaN HEMTs use the lateral drift region to block high voltage in off-state,the task of electric field optimization is with vital importance to achieve high VB in limited drift region length.2)As the natural-born 2DEG channel underneath the AlGaN/GaN heterojunction,conventional AlGaN/GaN HEMTs reveals depletion-mode operation.However,for power electronic applications,Enhancement-mode devices are preferred due to simpler drive circuit,lower power consumption and larger safe operation area margin.In this dissertation,structural and fabrication optimization are obtained through various experiments in details by the following sections:1)Section I proposed a novel structure of AlGaN/GaN Schottky barrier diode(SBD)featuring electric field optimization techniques of Anode-connected-Field-Plate(AFP)and magnesium doped p-type buried layer under the two-dimensional electron gas(2-DEG)channel.Compared with conventional AlGaN/GaN SBDs,the magnesium-doped p-type buried layer in the proposed structure provide holes that can help to deplete the surface 2-DEG as well as the mobile electrons in bulk region.As a result,a two-dimensional electric field optimization with uniform electric field distribution is achieved.Novel structure with total drift region length of 10.5?m and a magnesium-doped p-type concentration of 1×1017cm-3 achieves a high VB of 1.8 kV,showing 5 times improvement compared to the conventional SBD with the same device dimension.2)Section II proposed a leakage current suppression technique featuring hybrid-Schottky/ohmic-drain contact.Through the 2-zones leakage current suppression mechanism by the hybrid-Schottky/drain metal including the shielding effect on the rough ohmic-drain metal morphology and the drain side electric field modulation,AlGaN/GaN HEMT featuring this novel technique can significantly enhance the leakage current suppression capability and improve the VB.Device featuring the hybrid-Schottky/ohmic drain technique shows an improvement in breakdown voltage from 450 V(with no Schottky drain metal)to 855 V with a total drift region length of 9 ?m.3)An E-mode GaN-on-Silicon MOS-HEMT using thermal oxidation gate recess techniques is proposed in this section.Fabricated GaN-on-Silicon MOS-HEMTs achieves a + 2.5 V positive threshold voltage with a + 10 V gate swing.Device with 14 ?m drift region length achieves a maximum drain current of 200 mA/mm.Also an enhancement-mode GaN-on-Silicon MOS-HEMT using optimized CMOS-compatible techniques including gate region local thermal oxidation and Tetramethylammonium Hydroxide wet etching is proposed.Compared with previous technique featuring hydroxide potassium wet etch,the Tetramethylammonium Hydroxide solution can laterally etch the unoxidized AlGaN residues in the recess channel bottom,thus leading a high quality gate recess morphology without any residual AlGaN ridges in the channel bottom.The fabricated MOS-HEMT exhibits a high positive threshold voltage of + 2.5 V with minor transfer curve shifts(<0.2 V).Maximum drain current of 250 mA/mm and an off-state breakdown voltage up to 930 V are observed for the fabricated device of LGD =14 ?m.4)A gate-recessed GaN-on-Silicon MOS-HEMT device with true enhancement-mode operation and high breakdown voltage using a one-step simultaneous oxidation/dissolving treatment by hybrid alkaline solution with hydrogen peroxide and potassium hydroxide is reported.After 40-minutes wet etching at 95? solution temperature,the fabricated device features a true enhancement-mode operation with a threshold voltage of + 3 V.Combined with the three-terminal off-state breakdown voltage up to 1492 V for the device with 28 ?m drift region length,this technique manifests an easy,stable and low cost approach for the commercialization of normally-off GaN power devices.
Keywords/Search Tags:GaN-on-Silicon Power Electronic Device, Two-Dimensional Electric Field Optimization, Leakage current Suppression, Enhancement-mode MOS-HEMT, Thermal Oxidation Recess, Pure Wet Etch Recess
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