| Air quality and climate change are closely related to the atmospheric environment.Each pollutant has its own spectral characteristics.Quantitative analysis of pollutants can be achieved through spectral database and multi component spectral gas numerical algorithm.The satellite borne spectrometer can realize global coverage and reverse the formation,evolution and transportation process of air pollution.Remote sensing satellites orbit the earth at high speed,and small time errors can lead to huge observation errors.Therefore,remote sensing devices need to design local clock sources for satellite platform clock tracking and frequency doubling,and use the high precision local clock to record the initial exposure time of the satellite borne spectrometer.On the other hand,the remote sensing satellite,which works in the sun synchronous orbit,can cause the error caused by the abnormal reversal of the satellite clock because of the communication error,and the local clock source is needed to design the error correction strategy.Digital phase-locked loop design is the key technology of clock synchronization and frequency doubling,and long period input signal and large frequency doubling coefficient increase design difficulty from two aspects.Based on the complementary characteristics of the satellite clock and local clock timing error,this paper presents a design method for the fast locking of the digital phase locked loop for GPS second pulse synchronization and 10 000 times frequency doubling.The digital phase locked loop makes the local clock track the phase fluctuation of the satellite clock second pulse and eliminates the accumulated error of the local clock constantly.On the basis of the classical digital phase locked loop,the adjustable gain amplifier module is added.The fast capture and tracking of the input GPS second pulse is realized by the sequential digital phase detector improved by the phase frequency detector and the digital proportional integral filter.By analyzing the time domain model,the Z domain model and the S domain approximate model are established,and the response characteristics of the digital phase locked loop are analyzed.It is implemented with a field programmable gate array.In this paper,a local clock source error correction strategy based on field programmable gate array is proposed for the random reversal or loss of GPS second pulse and broadcast time packages.Local second pulse and local time package are generated by local crystal count,compared with GPS second pulse and broadcast time package,and GPS second pulse and broadcast time package state are judged by difference value.According to the number of GPS second pulse and broadcast time packages received in the normal state,we can determine whether it is reliable or not.Then,the decision is made to decide whether the local second pulse and the local time package are synchronized with the GPS second pulse and the broadcast time package,so as to achieve the stable output of the local clock.The laboratory test platform uses the host computer,the single chip computer,and FPGA completes the local clock source design of the satellite borne spectrometer,and completes the test.The airborne remote sensing platform is tested by Yun-12 airborne test platform and airborne spectrometer.The experiment shows that the digital phase locked loop can enter the lock state in the 5 input clock cycles,and the cumulative error per second is less than 0.1 ms,and the high frequency clock can be output steadily in practical application,which can meet the needs of the clock synchronization and frequency doubling of remote sensing devices.When an exception occurs,the local clock can use the inertial data stream to achieve stable output.After the satellite clock is restored to normal,the local clock can also be synchronized in 5 clock cycles.Linear fitting of the frame number and imaging time of airborne remote sensing image shows that the correction coefficient is 1,and the slope error is at 107 orders of magnitude,With good linearity. |