| The performance of the photovoltaic(PV) inverter can not only determine the safety, efficiency, stability, and reliability of the PV generation system, but also affect the service life of the whole system. In this paper, effective control strategies for the DC component minimization and the current harmonic suppression with grid voltage distortions are proposed. And the silicon carbide(Si C) devices with high-switching speed, high-blocking voltage, and low-switching losses are applied to the PV inverter, thus enhancing the power efficiency and density of the PV system.The DC component is a special issue in transformerless grid-connected PV inverter systems. The DC component can cause line-frequency power ripple, DC-link voltage/current ripple, and a further 2nd order harmonic in the AC currents. The ‘virtual capacitor’ strategy for the DC component minimization in single-phase PV inverters is extended to the three-phase inverters. The mathematical model for the three-phase system with blocking capacitors is derived in the synchronous rotational dq frame, where strong couplings exist between the d-axis and q-axis. Therefore, a DC component minimization method based on the DC component feedforward and the proportional-integral-resonant(PIR) controller in the combined abc-dq frame is proposed, which can effectively minimize the DC component, as well as the DC-link voltage ripple, the 2nd order harmonic, and the total harmonic distortion(THD) of the AC currents.When faced with distorted grid voltage, more harmonics will appear in the output currents of the grid-connected inverters. The performance of the conventional grid voltage feedforward strategy is affected by the errors in the grid voltage feedforward loop. Based on the analysis of the errors in the grid voltage feedforward loop, the impact of the errors is analytically derived. An open-loop simplified repetitive predictor is proposed with its hysteresis error derived numerically. To minimize the sampled signal distortion and cooperate with the linear phase characteristic of the repetitive predictor, the 2nd order Butterworth low-pass filter is carefully designed with the maximally flat magnitude response and the almost linear phase response. With the simplified repetitive predictor and the designed 2nd order Butterworth low-pass filter, the delay in the grid voltage feedforward loop is compensated, thus the current harmonics caused by the grid voltage distortions are effectively attenuated. In addition, the inverter starting current is suppressed.The split output inverter separates the upper Si C MOSFET from the lower Si C MOSFET using split inductors, which can overcome the limitations of the standard two-level voltage-source inverters with the fast-switching Si C devices. The split output inverter is investigated both experimentally and analytically, to reveal its advantages, disadvantages, and challenges in high-switching-frequency applications. The crosstalk-effect suppression is proved by the proposed mathematical model of the split output inverter. The captured switching transients verify that, the switching performance is improved and the electromagnetic interference(EMI) is reduced. Meanwhile, the split output inverter has issues such as the current freewheeling problem, the current pulses and voltage spikes of split inductors, and the disappeared synchronous rectification. The calculation results and the continuous operating experiments show that, the split output inverter can have lower power device losses at high switching frequencies compared to the standard two-level inverter. However, the split inductor losses can outweigh the reduced power device losses, impairing the efficiency of the split output inverter.A comparative study of the PWM with synchronous rectification(SRPWM) and the current direction related PWM(CDPWM) regarding harmonics, control, and efficiency is carried out to identify which PWM scheme is superior for the Si C-device-based split output inverters at high switching frequencies. Both the analysis and the experimental results verify that, apart from the requirement of the current direction, the CDPWM is superior to the SRPWM for the Si C-device-based split output inverters in high-switching-frequency applications. In addition, to further enhance the linear modulation index and simplify the calculation of the modulation wave, a geometry-simplified equivalent space vector PWM(SVPWM) is proposed. Combining the geometry-simplified equivalent SVPWM and the CDPWM which are respectively used for calculating the modulation wave and distributing the drive pulses, the split output inverter is operated with high-switching frequency, high DC-link voltage utilization, and low output current harmonics. |
