Research On High Power LED Packaging Based On Silicon Substrate

In the new century, as the next generation light source light emitting diode (LED) developed very fast in recent years. LED has many advantages compared with traditional light sources such as high efficiency, long lifetime, low power consumption, low population, small size, low work temperature, etc. These qualities lead to many applications such as traffic signal, back light source, automobile light, general lighting and so on. But before LED is adopted in wider areas such as projector, optical communication, automobile headlight and so on, the lumen flux density of LED needs to be enhanced further. Although the electro-optical conversion efficiency is increasing, most power consumption of LED is converted to heat. High temperature caused by poor heat dissipation has very negative influence on the optical and electrical performance of the LED. And LED chip and packaging material degrade rapidly with high working temperature, which leads to significant decrease of the LED usage lifetime. Low thermal resistance packaging substrate is critical to the development of high power LED. Silicon based substrate is an emerging substrate and developing very fast. In the research of this dissertation, silicon based substrate for LED packaging is proposed, studied, designed, fabricated and tested. Silicon based substrate is implemented to package three different types of LED chips. Key processes in the substrate fabrication process and packaging process are studied and discussed. Results and contributions are described as below:Unified process of silicon based substrate which is suitable for packaging different LED chip such as lateral, vertical and flip chip LED chip is studied and developed. Only physical dimensions of the substrate need to be redesigned according to LED chip’s specific details. Substrates fabrication process, packaging process and equipments are almost the same in packaging with different LED chips types. In this way the additional cost in the packaging of different types of LED chips is reduced.Key processes in the silicon based substrate fabrication process are optimized. Un-uniform photoresist layer in the spinning process caused by cavity will lead to different area on the wafer has different development time. Key parameters of lithography are optimized to solve the problem. The formulation of the solution in the wet etching process has been investigated and optimized to achieve smooth silicon surface after wet etching. Better copper layer quality is achieved in the copper electroplating process through key parameters optimization. The conflict between surface quality and un-uniformity of the copper which leads to delamination is solved.During the packaging process, phosphor layer conformal coating is achieved with help of cavity for lateral and vertical LED chip. Homogeneity of phosphor layer fabrication is increased. With precisely control of the physical dimensions of the cavity, self alignment bonding with flip chip LED chip is achieved. This technique enables the whole packaging process of flip chip LED chip wafer level packaging. It simplified the equipments and the process of the packaging, so the packaging speed is increased and the cost is reduced.Reverse ball on bond stich bonding method is utilized to achieve ultra low loop gold wire. The cost and time of the silicon based substrate fabrication is reduced with the help of this technique. Gold wire fabricated by this way won’t be damaged in the phosphor layer coating process. Gold wire fabricated with this method has lower strain and stress in the silicone than that fabricated with tradition method through thermal shock environment which is verified by simulation. Thermal shock test agreed with the simulation results very well. Pull test and thermal shock proved that gold wire fabricated by this way has better reliability than that fabricated by convention method.Silicone lens array is manufactured through molding method. The parameters of the lens have been optimized through simulation.Electromigration is a common reason for electro device. Multi-physics coupling simulation method of electromigration is established. Electromigration accelerated lifetime test platform is set up. Test and simulation results agree with each other very well.LED package module’s optical, electrical, thermal performance has been tested. The light output efficiency has reached to90-1101m/W. The lowest thermal resistance of substrate has reached to0.3K/W. High package density2×4LED chip array is achieved. Distance between LED chip in the array is150um. The maximum power density of the array is2.4W/mm2.