The Research On Supporting Process Of Nanoimprint Lithography Technology And Its Application In Led Manufacturing Industry

With the development of optoelectronic industry, the application of nanoscale photonics is becoming deeper and wider. The feature size of optoelectronic devices becomes smaller and smaller, the pattern complexityalso increases gradually. Nanoimprint Lithography (NIL), with the advantages of low cost, high resolution, high throughput and high flexibility, has become one of the most promising research interests in micro and nano fabrication.This thesis mainly gives a detailed study on NIL itself and some supporting fabrication process, and demonstrates the feasibility of its industrialapplicationin light emitting diode (LED) chip manufacturing through theoretical analysis and experiment research.First of all, at the basis of technological process of NIL, we present specific improved experiment programs for each step.(1) We propose the method of E-beam lithography combining with electroforming to fabricate the metal stamp in order to greatly prolongthe life of stamp.(2) Soft mold ultraviolet (UV) imprint process is presented to improve the yield of large area imprint. Besides, a method of temperature-pressure variation is applied to achieve better imprint result.(3)"Two steps" residual removing method is used to enhance the pattern fidelity.(4) Bi-layer resist process isalso proposed to trip the remainder resist and obtain perfect etched pattern.To expandthe application areas of NIL, a correspondingtechniqueof multi-mask transfer is raised to solve critical problems in soft mold UV-NIL.(1) Pattern willcollapse in the situation of high aspect ratio due to the physical property of the soft mold.(2) Lift-off process cannot be carried out because the UV resist can hardly be removed by traditional organic solvent.(3) Pattern may distort when fabricated on roughness substrate by reason of the nonuniform thickness of residue layer.Using the method of multi-mask transfer, a pattern mask is fabricated,whose line width is50nm and aspect ratio of which is over5. Besides, different duty cycle pillar photonic crystal NIL stamps and metal grating whose line width is50nm are both manufactured by modified lift-off process. Meanwhile, we fabricate high fidelity photonic crystal pattern on roughness gallium nitride surface.Finally, NIL is applied to LED chip manufacturing process. Through the analysis of LED luminous efficiency limiting factors, we furtherly presentusing NIL to fabricate nano patterned sapphire substrate (nPSS) in order to promotethe luminous efficiency. The finite-difference time-domain (FDTD) algorithm is used to optimize the detailed structure of nPSS, then NIL technology is demonstrated to fabricate corresponding nPSS LED chip. The photoluminescence (PL) efficiency of the modified chip is nearly doubled compared with the ordinary one.After packaging, the output power raisesby22.6%. Then, the modified lift-off process is carried out to fabricate large area hole pattern photonic crystal stamp by a pillar one. Hole and pillar patterns are both manufactured on Indium Tin Oxides (ITO) surface, and respectively, the PL efficiency is enhanced by95%and110%.