Evolutionary Design And Evolutionary Negatively Correlated Fault-Tolerant Design Method For Analog Circuits

Analog circuit is an indispensable part in modern electronic systems. If we want analog circuits to work steadily in harsh environments, it is important to de-sign these analog circuits with the consideration of fault-tolerance. Fault-tolerance means: if some errors occur in the electronic system, it still maintains acceptable performance. However, when electronic systems work in harsh environments, the influence could be uncertain. As a result, faults could be uncertain and unpre-dictable. Existing fault-tolerant design methods mainly concentrate on the design of fault-tolerant circuits for certain faults. However, if a circuit is influenced by some fault, which was not considered in the design process of the circuit, the performance of the circuit might be greatly impacted. Therefore, how to enhance the robustness of electronic systems on uncertain faults is an important question. This paper have conducted an exploratory investigation on how to use evolution-al}" methods to enhance analog circuits’ fault-tolerant performance on uncertain faults. Our work contains two parts:1) Evolutionary methods for analog circuit design.2) Evolutionary based fault-tolerant design method for analog circuit. On the aspect of analog circuit evolution, this paper experimentally studied sever-al evolutionary operators’ performance on the evolvement of analog circuits, and proposed a hybrid GA algorithm with hyper-mutation and elitist strategy. On the aspect of fault-tolerant analog circuit design. this paper proposed an evolution-ary negative-correlation framework ENCF. and studied the negative-correlation mechanism of ENCF. We also a novel fault-tolerant design method based on neg-atively correlated redundancies. Experiments show that negative-correlation in the frequency region of analog redundancies conduce to possible improvement on fault-tolerant performance of analog circuitsThe novelty and contribution of this paper are summarized as follows:1. On the aspect of analog circuit evolution, this paper proposed a novel method named HME-GA for the evolvement of analog circuits. In HME-GA, we introduced hyper-mutation and elitist strategy to traditional GA. Experimental results show that HME-GA is more efficient than traditional GA on analog circuit evolution problem. With the cooperation of elitist strategy, the efficiency of hyper-mutation in HME-GA is higher compared with that of simplex hyper-mutation. HME-GA is also the necessary work for us to continue the investigation to fault-tolerant analog circuit design.2. On the aspect of fault-tolerant analog circuit design, this paper conducted explorative investigation on fault-tolerant design for uncertain-fault envi-ronments, and proposed a novel fault-tolerant design method based on neg-atively correlated redundancies. In this method, we defined the negative-correlation between different analog circuits, and improved the generaliza-tion of fault-tolerant performance of analog circuit via negatively correlated redundancies. Statical results on the basis of various fault simulations show that negative correlation in frequency regions of different redundancies re-sults in possible improvement on the generalization of fault-tolerant perfor-mance of analog circuits. It means the proposed method is a promising way of fault-tolerant analog circuit design under uncertain-fault environment.3. This paper proposed an evolutionary negative-correlation framework ENCF for the evolvement of negatively correlated redundancies. ENCF is a proto-type, and it is also an important part for us to conduct our investigation on fault-tolerant analog circuit design under uncertain faults. ENCF contain-s multi-population strategy, candidate selection strategy, and interactive evaluation strategy. These strategies are the key issues that realize nega-tively correlated evolution. Experimental results show that, ENCF is able to evolve negatively correlated redundancies.In conclusion, this paper proposed some exposit ional researches on electronic robust design under uncertain faults. We proposed a. promising way of analog circuit robust design under uncertain faults. We wish our idea could provide novel inspirations for other researchers on further explorations in this field.