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Development Of Advanced Ⅲ-nitride Semiconductor MOS-HEMTs

Posted on:2012-01-12Degree:DoctorType:Dissertation
Country:ChinaCandidate:L YangFull Text:PDF
GTID:1228330338950095Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Firstly, the process of GaN-based MOS-HEMT device is optimized in this paper. The quality of Si3N4 passivation layer is improved by employing elevated plasma power. Stress and roughness of the device surface are improved by adjusting the ratio of He and N2 flow in the passivation process, thus increased the breakdown voltage of the device. Statistical analysis of Si3N4 dielectric material is done through a large number of experiments. The result shows that after optimizing the parameter of the Si3N4 film become stable and the deviation of thickness, the refractive index and the on-chip uniformity are less than 3%, 2% and 2%, respectively. Then, a high-quality gate dielectric is obtained by optimizing the parameter of Al2O3 atomic layer deposition (ALD) process. The total thickness of the sacrificial layer (>2.5μm), the baking temperature and the ratio of PMI and EMI are determined in this paper. By optimizing the thickness of air-bridge, the plating velocity and the current density, we get the optimal plating solution. Finally, a dual field plate MOS-HEMT device with high breakdown voltage and low off-state leakage is developed by optimizing each process step.The influence of the gate recess etching depth on the characteristics of MOS-HEMT device is investigated in this dissertation, the study found that through the etching time of 15s, 17s and 19s, the recessed gate depth of 1nm, 3.2nm and 3.7nm are formed. The peak carrier concentration are 2.61×1025m-3, 2.34×1025m-3 and 1.79×1025m-3 and the integrated carrier surface density are 1.12×1017m-2, 1.08×1017m-2 and 1.09×1017m-2, respectively. The density and time constant of interface state traps of devices with different gate recess depth are obtained by Gp-ωcalculation. It can be seen that the interface state density does not increase but decrease slightly after etching and the interface state time constant is the order of microseconds, which shows that the recessed gate structure can reduce the interface trap density between Al2O3 dielectric and barrier layer without new type of interface trap generation. Compared with conventional MOS-HEMT devices, the recessed gate MOS-HEMT devices are of better DC performance with higher saturation current density and peak trans-conductance. In addition, the gate recess etching can eliminate the introduction of low-energy F-ions in device process, therefore weakening the degradation of device characteristics caused by F-ion drift and improving the reliability of the device. The current collapse phenomenon is investigated in both conventional MOS-HEMT devices and recessed gate MOS-HEMT devices. A serious current collapse is observed in conventional MOS-HEMT devices, while subtle current collapse is observed in the recessed gate MOS-HEMT devices. Finally, the power characteristic measurement is carried out on conventional MOS-HEMT devices and the recessed gate MOS-HEMT devices, the results suggest that the recessed gate MOS devices are of better power characteristics.O2 plasma treatment is employed in this paper to reduce the damage caused by gate recess etching. An insitu oxide-layer is formed during the treatment which effectively reduce the frequency dispersion of capacitance and the drift of CV curve, thus forms a very high quality Al2O3/AlGaN interface. Secondly, the O2 plasma treatment can improve DC and AC characteristics of recessed gate MOS-HEMT devices with higher saturated output current, smaller off-state current, better sub-threshold characteristic and less fast-state traps. Finally, the O2 plasma treatment can improve the frequency characteristics of recessed gate MOS-HEMT devices which mainly reflected in the impedance decrease of the output port reflection coefficient (S22).A high-performance AlGaN/GaN/Al0.07Ga0.93N recessed gate MOS-HEMT device is reported in this paper with a 5nm ALD Al2O3 gate dielectric and an AlGaN buffer layer. The electrical parameters of a device (0.6μm×100μm) are as follows: the threshold voltage is -1.3V, the peak trans-conductance is 223mS/mm and the saturation current is 894mA/mm at Vg=4V. When VD is increased from 10V to 30V, the sub-threshold voltage swing is 650mV/decade and DIBL is 42.5mV/V, which suggests that the introduction of Al0.07Ga0.93N buffer layer can suppress the reduction of barrier height. Recessed gate MOS-HEMT device with AlGaN buffer layer has excellent breakdown performance with the breakdown voltage of above 160V. The fT and fmax of the device are 18GHz and 40G, respectively. Besides, the device also has fairly good power characteristics. The saturation power density and PAE are 7.2W/mm and 61.4%, respectively. On-state and off-state high-electric-field stress results are presented for AlGaN/GaN/Al0.07Ga0.93N (buffer) recessed gate MOS-HEMT devices. Under on-state stress, devices show less DC characteristic degradation than conventional devices, which shows that AlGaN buffer layer can effectively eliminate the hot carrier effects. Under off-state stress, the AlGaN back barrier structure can suppress the injection of gate electrons, thus improving the reliability of the devices. Another high-performance AlGaN/AlN/GaN recessed gate MOS-HEMT device is reported in this paper with a 5nm ALD Al2O3 gate dielectric. The electrical parameters of a device (0.6μm×100μm) are as follows: the pinch off voltage is -5V, the pinch off current is 0.005mA/mm and the saturation current is 1.6A/mm at Vg=3V. This kind of device has excellent AC performance. Minimal current collapse is observed in short pulse-width (τ<1μs) test, while basically no current collapse is observed in long pulse-width test. fT (19GHz) and fmax (50GHz) of devices are obtained by using |H21| and U (MSG/MAG) extrapolation method. The ratio of fT and fmax is 2.6, which show that the device is of low parasitic effect. A 21-parameter small signal model of AlGaN/AlN/GaN recessed gate MOS-HEMT device with higher accuracy is proposed based on the conventional FET small signal model by considering the gate leakage, the distribution character of capacitance under high frequency and the cross impact between Gate-Source and Drain-Source. Besides, this novel AlGaN/AlN/GaN recessed gate MOS-HEMT device is of excellent output power and PAE performance. The maximum output power density and PAE at 4GHz and VD=45V are 13W/mm and 73%. When VD is increased from 30V to 45V, the output power is raised from 6.3W/mm to 13 W/mm linearly, and the PAE is maintained at around 73% without any degradation. It is also believed to be the best microwave performance ever reported in 4GHz for recessed Al2O3/AlGaN/AlN/GaN MOS-HEMTs.
Keywords/Search Tags:Recessed gate, MOS-HEMT device, ALD, Al2O3, gate dielectric Power-characteristic, AlGaN/AlN/GaN-hetero-junction, AlGaN/GaN/Al0.07Ga0.93N(buffer), hetero-junction
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