Research On Current Protection And Stability Of DC-DC Converter

Nowadays, power management integrated circuits have been widely applied in the fields of communication, computer, consumer electronics and so on. Moreover, with the dramatical development of portable electronic devices, the demands for the large current, high efficiency and high reliability DC-DC products become more and more urgent. Following the market trend, this dissertation is focused on the theory and method research of loop stability and current protection in power management products with heavy load. Besides, solving related technical difficulties in order to improve the reliability and power efficiency of the system is also significantly concerned. The main work of this dissertation is as follows. 1. An adaptive on-chip frequency compensation structure for current mode buck DC-DC converter is proposed to overcome the drawback of loop stability which is dependent on the load. The converter with the proposed method can produce a system zero varying with load current to cancel the negative impact of output pole at different load, making sure the regulator works stably at full load. 2. A driving circuit for the high-side switch of high voltage buck converter is presented. 40 V P-channel lateral double-diffused metal-oxide semiconductor(PLDMOS) device whose drain-source and drain-gate can resist high voltage but source-gate must be less than 5V is used as the high-side switch. Compared with conventional driving circuit, the proposed driving circuit is able to provide stable and accurate 5V gate driving voltage for protecting the high-side switch from breakdown and achieve low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and the dead time is also introduced to reduce the shoot-through current loss. Therefore power efficiency is greatly improved. 3. A novel CC(constant current) / CV(constant voltage) control technique is proposed to overcome the drawback that the current limit is greatly affected by temperature, power supply and output voltage in conventional current limit method. The converter with the proposed scheme operates in either CC mode or CV mode. The CV mode regulates the output voltage. When output current reaches the CC threshold, the device enters CC mode to limit the output current. The two modes are regulated by their own negative feedback loop and thus output voltage and current limit with high accuracy are obtained. 4. A novel short-circuit protection technique for DC-DC buck converters is presented. The required short-circuit operating frequency is derived in order to avoid the effect of inherent propagation delay in the converter. During prolonged short-circuit status, the converter remains working with lowered peak current limit and operating frequency. Once the fault condition is removed, converters can automatically return to normal operation smoothly by clamping the soft-start signal via feedback voltage of the output. Therefore, the power loss during short-circuit situation is greatly decreased and the chip reliability is greatly enhanced. 5. A synchronous boost DC-DC converter with adaptive dead time control(DTC) circuit and anti-ringing circuit is presented. The DTC circuit is used to provide adjustable dead time and zero inductor current detection for power transistors and therefore a high efficiency is achieved by minimizing power losses such as the shoot-through current loss, the body diode conduction loss, the charge-sharing loss, and the reverse inductor current loss. Simultaneously, a novel anti-ringing circuit controlled by the switching sequence of power transistors is developed to suppress the ringing when the converter enters discontinuous conduction mode(DCM) for low electromagnetic interference(EMI) and additional power savings.6. A novel on-chip soft-start circuit with substrate switching technique for current mode boost DC-DC converter is proposed. The soft-start scheme effectively suppresses the inrush current in the inductor when the device is powered on. The short-circuit current is also limited and the converter is able to achieve smooth self-recovery as soon as the fault status is removed. The substrate switching technique allows the true shutdown of the output. Therefore, the power loss is decreased and the chip reliability is enhanced.