Design Of The Front-end Readout ASIC For WCDA In LHAASO Based On Current Mode TOT Technique

The Large High Altitude Air Shower Observatory (LHAASO) is proposed for finding galactic cosmic ray sources, which will be one of the world’s top five cosmic ray observatories. As one of the major detectors in LHAASO, the Water Cherenkov Detector Array (WCDA) uses Photomultiplier Tubes (PMTs) to detect the Cherenkov light generated by the secondary particles of air shower. The WCDA consists of four150m×10m water ponds, covering a total area of90000m2, in which3600PMTs are allocated. Both high precision time and charge measurement is required in a dynamic range of4000in the readout electronics. In this range, the time resolution is required to be better than500ps, and charge resolution should be better than30%@1Photo Electron (PE), and better than3%@PE. To simplify the structure of the WCDA readout electronics, a front-end readout ASIC is studied and designed based on the current-mode Time-Over-Threshold (TOT) method in this dissertation. This dissertation is organized as follows.The first chapter introduces the background of cosmic rays and the LHAASO experiment. Then the structures of WCDA and its readout electronics are discussed.The second chapter introduces typical methods of time and charge measurement in readout electronics of physics experiments, and compares two signal processing methods based on current mode and voltage mode in analogue ASIC design. Then some typical PMT readout ASICs are investigated, with their techniques and performance analyzed and compared.In the third chapter, characteristics of the PMT output signals and the requirements of the readout electronics are introduced firstly. Then the scheme of the ASIC under research is studied, and the current-mode TOT technique is finally determined as the kernel measurement method. Leading edge discrimination circuit is employed for time measurement, the output of which is also used to control the charging and discharging process for charge measurement. Combined with the following external Time-to-Digital Converter (TDC), both time and charge information can be digitized simultaneously.The fourth chapter presents the kernel techniques used in the ASIC:optimizing the signal to noise ratio of the preamplifier to achieve a good measurement resolution; designing a voltage-to-current converter with good linearity based on a flipped voltage follower to improve charge measurement performance; using a current-steering DAC to configurate the threshold of the current discriminator to improve the flexibility on the usage of the ASIC; designing a monostable circuit to generate the control signal for charging and discharging process to improve charge measurement linearity.The fifth chapter presents the pre-simulation results of the ASIC, including transient simulation to confirm its functionality, as well as time and charge measurement simulation. The models for analyzing the measurement resolution are discussed in detail. The simulation results indicate that a time resolution better than150ps, and a charge resolution better than4%are achieved with1PE input signal.The sixth chapter introduces the layout design, post-simulation results, and packaging considerations. The ASIC is desgined with Global Foundry0.35μm CMOS technology. Six signal processing channels are integrated within each ASIC (3mm x3mm), which corresponds to the signal readout of three PMTs. The results of post-simulation indicate that the time resolution is better than200ps, while the charge resolution is better than5%.The seven chapter presents the test results of the ASIC in the laboratory. The results indicate that a time resolution better than300ps and a charge resolution better than15%@1PE&1%@4000PE are achieved, both exceeding the application requirements.