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Advanced Cmos High-k Gate Dielectric Of The Experimental And Theoretical Research

Posted on:2010-12-05Degree:DoctorType:Dissertation
Country:ChinaCandidate:Q Q SunFull Text:PDF
GTID:1118360275991218Subject:Microelectronics and Solid State Electronics
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Along with the development of integrated circuit,Moore's Law is driving thescaling down of the basic element of integrated circuit,which is calledmetal-oxide-semiconductor field effect transistor (MOSFET).In the principle ofscaling down,we have to reduce the thickness of gate oxide with a scale of l/k atevery technology node.With the continuous scaling down of MOSFET,the thicknessof gate oxide is going to its physical limit.As it is not possible to reduce the thicknessof gate oxide anymore,we have to choose a dielectric with higher dielectric constant(High-k dielectrics) in order to maintain the gate capacitance.According to theproblems in the practical usage of high-k dielectrics,we investigate the high-kdielectrics in advanced CMOS devices with experimental and theoretical method.Oneside,we use atomic layser deposition and molecular bean method to deposit highquality Al2O3,HfO2,HfxAlyOz,single crystalline Gd2O3 and Nd2O3 high-k dielectrics,and systematically study the process optimization,material and electrical properties;on the other side,within the framework of first priciples calculation,we investigatethe impact of native defects and impurities on material and electrical properties ofhafnium based high-k dielectrics.The conclusions obtained in this thesis are of highacademically value for the applications of high-k dielectrics in advanced CMOSdevices.In chapter 1,we successfully fabricate high quality epitaxial single crystallineGd2O3 and Nd2O3 on Si(100).After forming gas treatment (for tungsten metal gate) or"Gate last"forming gas treatment (for Pt metal gate),we are able to passivate theinterface states existing between single crystalline oxide and silicon substrate,andreduce the leakage through gate and interface state density.According to the electricalanalysis,the single crystalline oxide on silicon exhibit good electrical properties:(1)the dielectrics constant of Gd2O3 is estimated to 21.5;(2) the oxide exhibit very goodinsulating capability.At the Equivalent Oxide Thickness of 1.4 nm,the gate leakageobtained is around 5.69×10-6 A/cm2,which is much lower than the requirement of MOSFET for low power application predicated by International Technology Roadmapfor Semiconductor;(3) the hysteresis of Gd2O3/Si(100) MOS structure is in the rangeof 10 mV and the interface state density is estimated in the level of 1011 cm-2eV-1.Moreover,we develop a method for estimation of near interface oxide traps (NIOT) insingle crystalline oxide.With the help of quasistatic C-V curve,we are able to extractNIOT by electrical method.The NIOT in Nd2O3/Si(111) MOS structure is around3.75×1012 cm-2.In chapter 2,one side,we successfully deposit the Al2O3,HfO2 and HfxAlyOzunder the framework of atomic layer deposition,and optimize the processes fordielectric deposition.The frequency dispersion and interface state density of HfAlO3.5high-k dielectrics on Si(100) are investigated from 1 kHz to 100 kHz.According tothe electrical analysis,the MOS capacitance density is reduced from 0.73μF/cm2 to0.71μF/cm2 because of parastic resistance.The strechout at -0.5 V of C-Vcharacteristics indicates the existing of slow interface states.Under the framework ofTerman method,the interface density of Al/HfAlO3.5/Si(100) MOS structure at 100kHz is estimated to be around 5×1011 cm-2eV-1 and1×1012 cm-2eV-1,and this valueis further confirmed by Hill-Coleman method;on the other side,in order to fabricatehigh quality Al2O3 high-k dielectrics on GaAs with atomic layer deposition,wepropose a new surface passivation method for GaAs surface,and with this method,the reoxidation of GaAs surface during atomic layer deposition of Al2O3 is greatlyinhibited.Moreover,this method can also remove elemental As on GaAs surfaceaccording to XPS analysis.As a result,the accumulation capacitance density ofAl/Al2O3/GaAs MOS structure is greatly increased.In chapter 4,we study the passivation mechanism of F to oxygen vacancy ofhafnium oxide.According to our results,oxygen vacancy introduces gap states in theband gap of HfO2 and is the source of Trap-Assisted Tunneling or Poole-FrenkelTunneling.After F goes into oxygen vacancy,it can replace the effects of missingoxygen at that place,and by the p-d interaction of F 2p orbital and Hf 5d orbital,F areable to push the gap state of Hf 5d orbital at oxygen vacancy to the conduction bandof hafnium oxide.As a result,F passivates the oxygen vacancy completely.Then,we compare the passivation effect of fluorine in HfO2 and HfSiO4.In HfSiO4,F gets theelectron from hafnium and push the electron from silicon back to the Si 2p orbitalbecause of difference of capabilility to donate electrons.Thus,the silicon around Fhas 7 electrons in its outshell and results in the failure of passivation of oxygenvacancy.In the lateral parts of this chapter,we compare the passivation effects of Fand N to the oxygen vacancy of HfSiO4.Based on our calculation results,F at oxygenvacancy is better than N at the reduction of gate leakage;on the other hand,F atoxygen vacancy is a rechargeable defects when the gate voltage is sweeping while Nonly serves as negative fixed charge.At this point,N is better than F.Consideringthese two points,N is better than F for the passivation of oxygen vacancy in HfSiO4.In chapter 5,we study the degradation mechanism of Cl,Ge and B impurities onelectrical performance of hafnium based high-k dielectrics.(1)Cl residue in HfO2 andHfSiO4 will be negative fixed charge and rechargeable defects depending on thespatial location of Cl in HfO2 and HfSiO4 lattice,and it can explain all theexperimental phenomenon observed by various groups;(2)according to the threekinds of Ge defect in HfO2(V3Ge,V4Ge and interstitial Ge),we are able to explainthe experimental results such as positive flatband voltage shift,enlarged leakagecurrent and C-V hysteresis induced by Ge defects,and with the help of theseconclusions;(3)+1 charged interstitial B introduces two gap states in band gap,andone is about 2.53 eV above HfO2 VBM which can cause Trap-Assisted Tunneling.And moreover,we also systematically explain the mechanism of B induce thresholdvoltage instability of pMOSFET.When pMOSFET is under negative bias,B ispositively charged,which will cause the threshold voltage of transistor towardnegative;on the other hand,when pMOSFET is not biased,B will partially releasethese positive charge,which recover the threshold voltage partially.
Keywords/Search Tags:High-k dielectrics, Atomic Layer Deposition, Molecular Beam Epitaxy, Single Crystalline Oxide, First-Principles Calculation, Epitaxial Growth, MOS Capacitance
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