| The information technology has become the global stratagem technology. Based on the photoelectron and microelectronics, communication and net technology has become the core of high-tech. As the main carrier of information technology, display devices play significant roles. Organic light emitting display (OLED) has been regard as the third era display. Compared with the LCD, OLED has the advantages of low power consumption, wide viewing angle, high brightness and fast response. Since AMOLED (active matrix OLED) can meet with the requirements of the large size and high resolution in the filed of flat panel display, it is regarded as one of the most promising flat panel displays in the future. The TFT array was used to achieve the high performance OLED display. The characteristic works of this article are the fabrication of high performance OTFT and active matrix OLED. The bottom gate structure and top gate structure copper phthalocyanine (CuPc) OTFTs were fabricated on glass substrates by multifold technology.The advantages or disadvantages of different technology and the dependence of device performance on the structure are discussed. The bottom gate structure OTFTs were prepared with Polymethyl–methacrylate–co-glyciclyl- methacrylate (PMMA-GMA) as the gate insulator layer. By reducing the insulator layer thickness, the OTFTs performances were improved with leak current decreasing to 10-11A and on/off ratio of 104. Under the condition of drain-source voltage -20V, a threshold voltage of -3.5V was obtained. The maximum operating frequency 0.62MHz can be obtained. The experiment results showed that PMMA-GMA is a promising insulator material with a dielectric constant in a range of 3.9-5.0 and the dielectric strength of 854 KV/mm. The top gate structure OTFTs on indium tin oxide glass substrates were prepared with Calcium fluoride (CaF2) as the gate insulator layer. The carrier field effect mobility ranges from 0.02 to 0.67 cm2/VS with the gate voltage. The gate leakage current was reduced. Because the devices were fabricated one-off by fully-evaporation method in vacuum chamber, the thickness of gate insulator can be controlled rigorously. The source-drain electrode prepared by photolithography technique can decrease the length of channel, rigorously regulate the W/L of channel and improve operation current and the degree of integration.Through measuring and analysising the electrical characteristic of the top gate structure CuPc OTFTs fabricated by thermal evaporation, the parameters using in Spice simulation were extracted, Finally comparing the device's electrical characteristic curve of simulation with measure results, it was known the proposed model was fitting well with the device we fabricated.Using the proposed model, several common digital circuits (inverter, NAND gate and current mirror) were simulated, their layouts were designed. Subsequently, those circuits were fabricated; the logic functions of those circuits were measured. The main factors which influence device's performance were analyzed. It lay a foundation for optimizing organic integrate circuit design and simulation.The low temperature P channel Poly-Si TFT driving OLED displays was studied. The parameters of pixel circuit were confirmed and 128×96×3 pixels low temperature Poly-Si TFT array layot was designed. The peripheral driving devices were integrated with the pixel array. After the design rule check, the net of layout was extracted. Comparing the net of layout with the net of schematic, the LVS was finished. The influence of parasitic capacitance and delayed signals had been discussed.A novel method is introduced using to evaluate the quality of TFT array for driving active matrix OLED. By the means of this method, the operation states of the TFT or the defects of TFT can be judged. It is a current testing method with the advantages of fast response,excellent precision, no effect to aperture and no damage to the display array.
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