Sub-Bands Decomposition Based Multi-Channels Algorithm For Active Power Filtering And Reactive Power Compensation

Recently, the distribution power system has become much more complex, and it requires more stable and higher quality for power generation, distribution, and consumption. Harmonic and reactive power currents in distribution power system will bring about serious problems. How to use of specialized equipments to cancel the harmonic and reactive power current becomes more and more important. Therefore, active power filter and reactive power compensator have been considered as an effective solution for these problems. To solve the problems existed in the research field of harmonic suppression and reactive power compensation, this paper works in the four areas as listed below.First, a novel wavelet packet (WP) based sub-bands approach for multichannel harmonic suppression and reactive power compensation is presented and analyzed. This technique distributes power rating into separated channels in frequency domain according to the characteristics of reactive power current and dominant harmonics. Based on this approach, the multiple power modules avoid the conflict between power rating and switching frequency of power electronic unit. Therefore, the proposed approach is suitable to implement harmonic suppression and reactive power compensation in high power applications. The influence of system frequency fluctuating on circle buffer realized periodized extension scheme is analyzed. Then an approach using phase-lock loop (PLL) controlled circle buffer to overcome this problem is presented. Simulation results show good steady-state and dynamic performance of the proposed approach, even when the distorted currents are three-phase unbalanced.Second, the characteristic of lifting-based discrete wavelet transform and the possibility of adopting this transform into the sub-bands decomposition is discussed. An efficient flipping structure for lifting-based discrete wavelet transform is introduced and analyzed. It can improve and possibly minimize the critical path and hardware resource requirement of the lifting-based discrete wavelet transform by flipping conventional lifting structures. An efficient flipping 9/7 WP-based structure is designed using very large scale integration (VLSI) technology. Though the paper could not complete the whole control design, it makes a useful exploration of the sub-bands decomposition based multi-channels algorithm realization for future harmonic suppression and reactive power compensation application.Third, according to the synchronization problem of active power filter, three phase phase-locked loop is introduced in this paper. Moreover, the control error of this system is discussed under harmonic, offset, and unbalance conditions. Addressing the architecture optimization, the algorithmic strength reduction, folded architecture and pipling method are adopted to design the controllers, including synchronous reference frame theory based distortion detection, infinite impulse response (IIR) low-pass filter, three-phase phase-lock loop, and hysteresis current controller. As a result, the entire control scheme of shunt active power filter is synthesized on a single medium scale field programmable gate arrays (FPGA) using VerilogHDL. Experimental results achieved from an shunt active power filter system show the steady-state and dynamic performance with realtime and accurate control.At last, to reduce the switching frequency and current error of a static synchronous compensator (STATCOM) for reactive power compensation, a novel direct current control (DCC) strategy is proposed. The proposed controller outputs the optimum switching pattern according to the double band hysteresis threshold scheme. By using reference current derivative transform instead of predictive method, the scheme accurately detects the location of reference voltage vector in stationary reference frame. This technique can achieve a stable and fast response, while maintaining the switching frequency lower than other conventional current control techniques. Meanwhile, a compact algorithm of space vector pulse width modulation (SVPWM) for three-phase inverters is proposed and developed in this paper. Simplified by the proposed method, the conventional SVPWM is decomposed into fast integer operations entirely by using an intermediate vector, which will properly counteract the redundant calculations of the remaining procedures. This concept can not only simplify a two-level scheme, but is also suited for multilevel implementation. Since it can be implemented without any multiplier or divider, the fast algorithm is especially suitable for FPGA applications. Then an area- and speed-efficient IP-core based on this algorithm is built and tested. It ensures lower hardware resource usage, and at the same time, operates several times faster than some reported examples. An voltage and current control of STATCOM is proposed by using the simplified SVPWM-based controller. Experimental results are investigated to demonstrate the STATCOM performance using the design controller under steady state and dynamic operation.