Research On Hardware Immune Systems And Algorithms

Artificial Immune System (AIS) is an intelligent computation approach inspired by immunological principles. The field of AIS develops novel engineering computation models and algorithms by exploring the information processing mechanisms in the biological immune system for solving many kinds of complex problems of information processing. As an interdisciplinary research field derived from immunology and computer science, the AIS has become a rising hot field in the area of Computational Intelligence (CI).As a new branch of AIS research, Hardware Immune System (HwIS) is emerging as an attractive research field. Based on the models and algorithms of AIS, the HwIS explores new approaches to fault tolerance hardware system, and develops new models and methods for online fault detection of complex hardware systems.This dissertation develops feasible solutions for the incomplete self set problem and dirty self set problem of the hardware immune systems in practical applications, and designs and implements a self-adaptive hardware immune system for the detection problem of the faults of program running out of track in single-chip microcontroller IP cores. The research work of this dissertation consists of the following parts.(1) Aiming at the detection problem of the faults of program running out of track in single-chip microcontroller IP cores, a simple hardware immune system with fundamental fault detection functions is designed and implemented. The effectiveness of the system is verified on an FPGA experimental platform. Moreover, the incomplete self set problem and dirty self set problem of the hardware immune systems are presented considering the characteristics of the practical application environments. To deal with the two problems, a self-adaptive framework of hardware immune system is proposed.(2) Inspired by the co-stimulation mechanism in the biological immune system, a novel co-stimulation-based self-tolerant algorithm and several different detector set updating strategies are proposed to deal with the incomplete self set problem of the hardware immune systems in practical applications. In a hardware immune system with the novel algorithm and strategies, the false positives (events of recognizing a self individual as non-self) caused by the incomplete self set can be reduced, and the increase in the false negatives (events of recognizing a non-self individual as self) caused by updating the detector set can be reduced, too. The effectiveness of the algorithm and the strategies is verified by the simulated experiments. This part of work provides an approach to achieving self-tolerance in the hardware immune systems.(3) To deal with the dirty self set problem of the hardware immune systems in practical applications, four different co-stimulation-based strategies for dealing with the dirty self set problem and a receptor editing mechanism for dealing with the self-reactive candidate detectors are introduced. The strategies can reduce the false negatives caused by the non-self individuals in the dirty self set by recruiting new detectors, and the successful ratio of recruiting a new detector can be increased by the receptor editing mechanism. The effectiveness of the strategies is verified by the simulated experiments. This part of work provides an approach to the dirty self set problem of the hardware immune systems.(4) Aiming at the detection problem of the faults of program running out of track in the single-chip microcontroller IP cores in practical applications, a self-adaptive hardware immune system is designed and implemented. With the assistance of the co-stimulation mechanism, the system can update the self set and the detector set automatically. Consequently, both the false positives caused by the incomplete self set and the false negatives caused by the dirty self set can be reduced. The effectiveness of the implemented system for dealing with the problems of incomplete self set and dirty self set is verified on an FPGA experimental platform.In this dissertation, a simple hardware immune system with fundamental fault detection functions for detecting the faults of program running out of track in single-chip microcontroller IP cores is designed and implemented, and the incomplete self set problem and the dirty self set problem of the hardware immune systems in practical applications are presented and studied. To deal with the two problems, a novel self-tolerant algorithm, several different detector set updating strategies for dealing with the incomplete self set problem, and four different strategies for dealing with the dirty self set problem are introduced. The effectiveness of the introduced algorithms and strategies is verified by simulated experiments. According to the introduced algorithms and strategies, a self-adaptive hardware immune system for detecting the faults of program running out of track in single-chip microcontroller IP cores is designed and implemented, and the effectiveness of the system is verified on an FPGA experimental platform. The work of this dissertation is not only a solid contribution to the field of HwIS, but also a valuable example of the industrial applications of the hardware immune systems.