Research On Interconnect Access Issues Of Cluster Communication System

Cluster is a widely used architecture in supercomputer. The SMP cluster plays a dominant role in the high performance computer field for its favorable scalability, usability, reliability and high performance/cost ratio. The performance of nodes in the cluster system is increasing continuously, which calls for corresponding improvement on the performance of the interconnect access of nodes, or else it will be the bottleneck of cluster performance. The study on the interconnect access technology of cluster communication system is a major issue of the high performance computer system architecture.After analyzing cluster architecture and interconnects, an interconnect access system hierarchy structure of cluster communication system is introduced in this paper. Based on the structure, a network interface (NI) based on the memory bus is designed for the network interface card (NIC). The design not only improves the access performance between the NIC and the NI, but also, what is more, sets a new application mode on the memory bus which converts the memory bus to a local bus for system peripheral interconnection. The great effect of this mode is adding a high efficient I/O bus to computer system, whatever universal or embedded system. Furthermore, the research includes the implementation of the mode and gives the detail design of the memory target interface (MTI), which is used in converting the memory bus to a local bus, furthermore, provides full interface functions for all the design of devices based on the memory bus.Then, this paper mainly concentrates on designing a new node's cluster interconnect NIC based on the universal embedded system. As the device for nodes to access interconnects, the efficiency and function of NIC is critical to the access performance of nodes. In view of the development of embeddedtechnology, a NIC based on the Intel IOP310 I/O processor chipset is designed and implemented for DCNet, which is abbreviated to DCNet-NIC. DCNet is the interconnection of Dawning 4000A Cluster. A memory integrated network interface (MINI) adopting MTI technique is embedded in the DCNet-NIC architecture, which is a significant achievement on the NIC architecture. Furthermore, the all-around test and evaluation of DCNet-NIC is performed. The testing results show that the DCNet-NIC obtains competitive communication performance compared with the NIC of Myrinet, SCI, and QsNet, and prove that the way to design high performance NIC based on embedded system and the MTI technology is feasible and effective.Finally, the research is extended to the design of a host/PCI bridge, which is a bridge connecting the internal bus and PCI bus for the node's chipset. The host/PCI bridge not only performs bus protocol conversion between the different types of buses, but also matches the I/O performance between the node and the NIC in cluster communication system. The architecture of SMP chipset based on Godson CPU is discussed, and the related theories and techniques of PCI bus interface are analyzed. The design and verification of the host/PCI bridge in the chipset is presented in this paper.As an important part of our research work, the specific design instances of some key technologies in the above mentioned interconnect access system hierarchy structure of cluster communication system are detailed, and the precise tests and objective remarks to the design are made in this paper.