Research On MPSoC Data System For Multiple Interrelated And Concurrent Tasks

State of the art fabrication technology for integrating numerous hardware re-sources such as Processors/DSPs and memory arrays into a single chip enables theemergence of Multiprocessor System-on-Chip (MPSoC). The extremely high process-ing efficiency and computing throughput of MPSoC is mainly determined by the ef-ficiency of data supplies for computing resources, and the efficiency of data transfer-s within memory traffics. In this thesis, the software and hardware architectures inMPSoC, which have been mainly used for the realizations and optimizations of datasupplies and transfers, are collectively referred to as MPSoC data system.Current MPSoCs are highly efficient for the applications with regular and pre-dictable data system access behaviors. The efficiencies of data supplies and transfersare steady and controllable. Therefore data computing and transferring procedures arewell orchestrated to significantly speed up the applications. On the other hand, appli-cation scenarios with multiple interrelated and concurrent tasks have become a newapplication domain for MPSoCs. In these applications, multiple tasks are interrelatedwith each other in data producer-consumer relationships. Besides, data access pat-terns within each task are complex and varied. MPSoC data system is heavily sharedamong concurrent while interrelated tasks, and the regularity and predictability of da-ta system access behaviors are hard to maintain. Therefore it is difficult to keep theefficiencies of data supplies and transfers steady and controllable which lead to poor parallel speedups in conventional MPSoC data systems.In traditional MPSoC parallel methods, the target task is directly tuned and op-timized based on steady and controllable MPSoC data system efficiencies. Exper-imental results have shown the ineffectiveness of the above method when multipleinterrelated and concurrent tasks have been introduced. In this thesis, task indirecttuning and optimization method, which achieves target task optimization by joint tun-ing and optimizations of multiple tasks, has been proposed and validated. Based onthe task indirect tuning and optimization method, MPSoC data system design targetshave been set as observability, predictability, and multitask dynamic tunability. Fur-thermore, the framework of MPSoC data system composed by software and hardwarearchitectures has been proposed. The software architectures are mainly composed bythe decoupled software programming paradigm and the lumped task tuning model.The hardware architectures are mainly composed by the decoupled local memory anddata management architecture, and the separated processor status and data intercon-nection architecture. Moreover, multitask interrelation matrix and its solving methodhave been given to describe the relationships between tasks and develop task tuningstrategies in the runtime.Experimental results have shown the effectiveness of the proposed MPSoC datasystem for parallel optimizations of multiple interrelated and concurrent tasks scenar-ios. Besides, the generality and applicability of the proposed software architectures,and the advantages of the proposed hardware architectures for dynamic tuning andoptimizations have been proved by experiments based on the third party processors.