The Research Of Oxide TFT And AM-OLED Driven By Oxide TFT

Metal oxide thin film transistors (Oxide TFT), as a promising new TFT technology, has attracted many people working in this area because its advantages such as: high mobility, low cost and transparency in the visible range. But there are still some challenges such as reducing the drive voltage and improving the stability of the devices. In this dissertation, we have performed meaningful work relating to the reducing of drive voltage by using high-K insulator, improving the device stability and fabricating tne AM-OLED matrix based Oxide TFT array. The results are listed as follows:1. The research of low drive voltage Oxide TFT. We have fabricated low drive voltage Oxide TFT with single layer Ta₂O₅ and Ta₂O₅/SiO₂ multilayer as the insulator. The influence of Ta₂O₅ insulator thickness and SiO₂ modification to the TFT performance has been investigated.a)We have fabricated and investigated different thickness Ta₂O₅ insulator based ZnO-TFTs. The experiment results indicated that with the Ta₂O₅ gate insulator thickness increase from 40 nm to 85 nm the field effect mobility for the corresponding device declined, the values were 71.2 cm²/VS, 63.8 cm²/VS and 59.3 cm²/VS for the 40, 60 and 85 nm insulator based devices, respectively. Atomic force microscope images show that the RMS of the Ta₂O₅ films decrease as the film thickness decrease. This is the main reason for the enhancement of the field effect mobility. The Ion/Ioff ratio and threshold voltage for the 85 nm, 60 nm, and 40 nm insulator devices are 4.8×105/1.5 V, 3.2×104/1.2 V and 7.2×103/0.9 V, respectively. In general, the 85 nm insulator device shows the best overall performance.b) In order to reduce the off-state current and improve the stability of the Ta₂O₅ insulator based ZnO-TFTs, we modified the Ta₂O₅ insulator with SiO₂ thin films. The performance of the device was obviously improved after adding of the thin SiO₂ layers such as: enhancement of on/off ratio by one order of magnitude, the reduction of subthreshold swing from 0.32 to 0.28 V/dec, increase of the field effect mobility (from 46.2 cm²/VS to 52.4 cm²/VS), as well as reduction of the hysteresis in IDS vs VGS curves and Capacitance-voltage characteristics. The Capacitance-voltage and C-2 vs voltage characteristics were investigated, from which the trapped charge density at or near the interface between insulator and ZnO layer as well as the carrier's concentration of ZnO film are calculated. The performance enhancements are attributed to the reduce of leakage current, smoother surface morphology and suppress of charge trapping by using SiO₂ films to modify the high-κTa₂O₅ dielectric.2. The research of the stability for the SiO₂ insulator based metal oxide TFTs. The detailed works include:a) We have fabricated and investigated different thickness SiO₂ insulator based ZnO-TFTs. The experiment results indicated that the thickness of the SiO₂ insulator not only affect the device's mobility and on/off ratio but also the stability of the device. The best performance device is obtained with the SiO₂ dielectric150 nm. The fieldd effect mobility, on/off ratio and subthreshold voltage is 6.1 cm²/V.s, 1.1×107 and 1.6 V/dec, respectively. The 150 nm thickness insulator based device also shows a much small threshold voltage shift of 3 V after the gate voltage stressed for 1 hour, while these values for the 230 nm and 300 nm insulator based devices is 6 V and 9.4 V, respectively.b) We have fabricated and investigated different oxygen partial pressure SiO₂ insulator based ZnO-TFTs. The experiment results show that the oxygen partial pressure play an important role on enhancing both the field effect mobility and bias stability of the devices. The best performance device is obtained with 20% oxygen partial pressure SiO₂ dielectric, which with the smallest leakage current compared with the other two type insulators. The field effect mobility, on/off ratio and subthreshold swing for the 20% oxygen partial pressure SiO₂ dielectric based device is 8.1 cm²/V.s, 1.8×108 and 1.35 V/dec, respectively. The 20% oxygen partial pressure insulator based device also shows a much small threshold voltage shift of 2 V after a 20 V gate voltage stressed for 1 hour, while these values for the 15% and 30% oxygen partial pressure insulators based devices is 7.3 V and 3 V, respectively.c) The influence of substrate heat and annealing to the metal oxide TFT's stability characteristics. Through theoretical calculation, we find that the charge trapping in the insulator layer, channel layer and insulator/channel interface is the mainly reason for the instability of the oxide TFT. The experiment results indicate that substrate heat and annealing could effectively reduce the trapping in the insulator layer, channel layer and insulator/channel interface and thus improve the stability of the devices. In the present work, we reduce the threshold voltage shift of the oxide TFT from 18 V to 3 V by annealing.3. The research of bottom-gate and top-gate IGZO-TFT.a) We fabricated TFTs with amorphous In-Ga-Zn oxide (a-IGZO) as channel layer and SiO₂ as dielectric by radio frequency magnetron sputtering. Experiment results indicated that post-annealing treatment greatly improve the device performance such as: the field effect mobilityμsat increase from 4.98 to 7 cm²/V.s, threshold voltage Vth decrease from 30 V to 22 V and sub-threshold swing reduce from 3.2 V/dec to 1.85 V/dec. The gate bias stress induced instability was investigated at different temperature. The time dependence of threshold voltage shiftΔVth is fitted with a stretched exponential equation, indicating theΔVth under bias voltage stress is originated from the trapping of charges in trap centers located in the interface and bulk dielectric layers. The temperature dependence of characteristic trapping time reveals that the trapping process is thermal activated, further the average energy barrier and activation energy were estimated.b) We have fabricated top-gate thin-film transistors (TFTs) using amorphous In-Ga-Zn-O as the n-channel active layer and SiO₂ as gate insulator by radio frequency magnetron sputtering at room temperature. In this device, a SiO layer was used to be a buffer layer between active layer and gate insulator for preventing the damage of the InGaZnO surface by the process of sputtering SiO₂ with relatively high sputtering power. The thickness of buffer layers were studied and optimized for enhancing the TFTs performances. Contrasting to the TFTs without buffer layer, the optimized thickness of 10nm SiO buffer layer improve the top–gate TFTs performances greatly: mobility increase 30%, reached 1.29 cm²/Vs, the Ion/Ioff ratio increase 3 orders, and the traps density at the interface of channel/insulator decrease about 1 order, indicated the improvement of semiconductor/dielectric interface by buffering the sputtering power.4. Fabrication of AM-OLED matrix based on metal oxide TFT array.a) We designed and relized an IGZO-TFT array with the structure of"2 TFT, 1 capcitance". We solved the key problems of"source/drain metal electrodes"and"etch stopper"for the lithographic process of IGZO-TFT array and worked out the lithographic process of the AM-OLED matrix.b) We investigated influence of the SiO₂ insulator fabrication parameter to the metal oxide TFT's performance and obtained the optimal parameter. Based on these basic researchs, we fabricated the oxide TFT array based AM-OLED matrix. The mobility and on/off ratio of the TFT array are generally 1.5 cm²/Vs and 10⁷. And we realize effective control of the AM-OLED matrix pixels exceeding 70%.