Research On The Design And Simulation Of Symmetric Cipher Cluster

Security and efficiency must be considered together by cryptographic scholars when an encryption algorithm is designed. In practical applications, various cryptographic services are required by different users. It is very important for cipher designers to meet users'requirements about efficiency and diversification of cryptographic services besides ensuring security of encryption algorithms.The main contribution of this thesis is to design a symmetric cipher model (symmetric cipher cluster model) which may change its structure dynamically when control key varying. The algorithm component design is given from two ways, namely using stream cipher or block cipher. Rationality and feasibility of symmetric cipher cluster are verified by hardware implementation.Different from traditional designs, by dividing the key space into algorithm keys and data keys, the concept of cipher cluster is given. On the one hand, compared with one-time pad cryptosystem, the model reduces costs of key maintenance, while it provides a dynamically variable algorithm to improve the ability resisting current attacks. The design of cipher cluster conforms to the principle that security and efficiency ought to be considered together. On the other hand, cipher cluster model can provide users with many choices of algorithms, complying with the trends of the combination of cipher design and application.About stream cipher, this thesis focuses on driven components design as to the combination model of the most commonly used driven components and non-linear component parts. The software/hardware costs and implementation efficiency of the model are discussed by using a class of word based driven component, named -LFSR. And the factors affecting its performance are analyzed by considering Snow2.0 algorithm. This thesis also gives a class of clock-controlled model suitable for hardware implementation. Unlike traditional clock-controlled and cascading jump model, the model proposed not only performs better (operating fewer tempos, and having less register overhead), but also increases difficulty to attackers because of non-commutative state transition matrix.As for block cipher, the components design is discussed from substitution layer and diffusion layer. This thesis investigates cryptographic properties of AES, Camellia and SMS4, and presents a kind of S-box construction model called H-type S-box. According to features of hardware implementation, a lot of S-boxes are selected using some restriction conditions. It claims that the new kind of S-box is suitable for hardware implementation and possesses good cryptographic properties. For convenience of implementation, several small S-boxes are combined to build diffusion layer in current algorithms. Aiming to that point, a general S-boxes reorganized algorithm is proposed, which costs less in software/hardware implementation and has better scalability. By investigating the procedure of AES mixcolumn transformation, a number of new mixcolum transformations are proposed, in which encryption and decryption implementation may use the same circuits. While retaining the best diffusion features, the new kind of mixcolum transformation obtains almost the same cost and efficiency as that in AES mixcolumn transformation. This thesis also gives hardware implementation of several cipher cluster instances. Under the framework of 3G Snow algorithm, cipher cluster description is given using -LFSR to replace its driven components, and the FPGA implementation is evaluated using different forms of -LFSR. The improved cipher cluster has less resource cost and higher throughout compared with Snow 3G. FPGA implementation of AES algorithm frame cluster is also given with variable parameters, such as SubBytes, ShiftRows MixColumns and so on. The hardware cost of the algorithm cluster is discussed from the view of engineering implementation. A key-controlled AES algorithm cluster with multiple S-boxes is proposed by using a special class of H-type S-Boxes. The cipher cluster increases just one XOR operation than AES algorithm. Experiments results show that all measurements of the algorithm hardware implementation are nearly the same with those of AES algorithm. The AES and Camellia cluster are given when their components are shared. By dividing operations of S-box transformation, reconfigurable implementation of AES and Camellia are proposed using parallel processing method. The testing results show the scheme proposed has a higher speed compared with implementation of single AES or Camellia.