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Surface-electrode Ion Trap Chip For Scalable Quantum Computing

Posted on:2015-10-06Degree:DoctorType:Dissertation
Country:ChinaCandidate:W LiuFull Text:PDF
GTID:1108330509461076Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
At present, the quantum effect is inevitable since the feature size of semiconductor transistors is gradually scaled to the physical limit. It is urgent to explore new computing models for satisfying the higher performance requirement. Quantum computation is a new cross subject of quantum mechanics and computer science. Quantum computation is thought to be a revolutionary technology since it is capable of solving specific problems faster than that of classical computers. Significant advances have been made for physical realizing quantum computers. Ion trap quantum computing physical system ranks the top since the merits of long coherence time, logic operation with higher fidelity, and so on.The experiment of ion trap system is still subject to limited scale. Surface-electrode(SE) ion trap is an effective scale approach due to its compatibility with the existing semiconductor process. In this paper, the key technologies of multi-qubits SE ion trap chip design and fabrication are studied, such as the optimization of ion trap chip configurable architecture, designing of two-dimensional array and one-dimensional linear structure,and optimization the implementation of Shor’s algorithm in higher-dimensional system with anharmonic ion trap. The main contents and innovations of this thesis are shown as follows:1) A configurable SE ion trap design is proposed to alleviate the poor reusability of the existing traps. It can architecturally and electrically support 5 mainstream modes by design reuse, thus enhancing the trap reusability and reducing the experiment setup overhead. We also developed a corresponding simulation suite which can optimize trap geometries and calculate trap parameters to control the trapped ion’s classic motion. According to our analytical and simulated results, the configurable design can serve as a unified platform for basic research of large-scale quantum information processing.2) A flexible method to systematically optimize the shape of radio frequency(rf) rails in different components of two-dimensional ion trap chip is proposed. The rf rails are discretized in the electrostatic calculation; thus, the spatial fields of different components can be accumulated according to the superposition principle. Artificial control points along the edges of the rf rails provide controllable degree of freedom, which can enhance the flexibility of the proposed method. The proposed hybrid multiobjective function can facilitate weighting coefficients selection. The strategy of "space for time" involved in the objective calculation can reduce the optimization time overhead.3) A quantitative model is proposed to guide anharmonic chips design. The model is based on linear equations and can be easily and quickly solved by quadratic programming. Based on the model, we analyze the impact of the architectural parameters, including the width, number, applied voltage, and gap of prerequisite active electrodes,on the number and spacing of trapped ions. Sets of optimal anharmonic trap design are given.4) We proposed several optimization schemes for Shor’s algorithm implementation with higher-dimensional system and take a ternary version for factorizing 21 as an example. Such optimized quantum circuit is then encoded into the nine lower vibrational states of an ion trapped in a weakly anharmonic potential. Optimal control theory is used to obtain the manipulation electric field. The ternary Shor’s algorithm can be implemented in one single step. Numerical simulation results show that the accuracy of the state transformations is about 0.9919.5) According to the chip design trade-offs obtained from the former studies, we designed and fabricated a linear SE ion trap chip. The chip can be used to harmonically trapping, linearly transporting, and anharmonically trapping of ions. Process parameters are explored, and then the physical characteristics of the prototype chip, including the electrode morphology, electrode size, and breakdown voltage, are tested in detail. At present, atomic signals are obtained and ion capturing experiments are ongoing.
Keywords/Search Tags:Quantum information processing, Surface-electrode ion trap, Scalable, QCCD, anharmonic, High-dimensional system
PDF Full Text Request
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